이전(PR#5)은 비루프 AnalogPoint에만, 또 realtime=False로 보조를 넣어 적산 QV가 크롤러 폴링집합(is_active AND realtime_enabled)에서 빠져 라이브로 흐르지 않았다. - is_analog 판정을 분기 앞으로 올려 모든 AnalogPoint(루프 포함)에 보조 처리 적용. 루프 엔트리와 겹치면 seen_tags가 중복 흡수. - 슬롯명 있는 A1~A4를 일반적으로 모두 어드레싱(공백 슬롯만 제외). - realtime 기본값(True) 사용 → 보조도 폴링 대상. QV=연속 누적값만 archive 유지. - FlexibleParameter(사용자정의)는 기존대로 realtime=False(폴링 제외) 유지. 맵 재생성(c1~c4): 순수 추가. C3 +6(FICQ-8118/LICA-5113 GAIN/RATE/RESET 등 루프 보조 누락분), 리포트 스팀적산 FIQ-*.QV 전부 포함, 제거 0. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
21149 lines
465 KiB
JSON
21149 lines
465 KiB
JSON
{
|
|
"controller": "C4",
|
|
"report_generated": "2026-06-19",
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|
"float_format": "FP_B",
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|
"notes": "Register map built from Sinam_Tag_all.xlsx (C4 only). Experion point names are keys; .MD reads LoopStatus(0xBE) and writes AutoManState(0xBA). archive flag indicates history target.",
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|
"register_count": 2114,
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|
"registers": [
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|
{
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|
"tag": "FICQ-9101.PV",
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"addr": 64,
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|
"write_addr": 64,
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"count": 2,
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"type": "float32",
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"access": "R",
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"description": "LOOP #1 PV",
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|
"archive": true
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|
},
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{
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"tag": "FICQ-9101.RSP_SP2",
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"addr": 66,
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"write_addr": 66,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 RSP_SP2",
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"archive": false
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},
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{
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|
"tag": "FICQ-9101.SP",
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"addr": 68,
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"write_addr": 68,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 WSP",
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"archive": true
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},
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{
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"tag": "FICQ-9101.Output",
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"addr": 70,
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"write_addr": 70,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Output",
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"archive": false
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},
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{
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"tag": "FICQ-9101.PV_B",
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"addr": 72,
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"write_addr": 72,
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"count": 2,
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"type": "float32",
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"access": "R",
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"description": "LOOP #1 PV_B",
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"archive": false
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},
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{
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|
"tag": "FICQ-9101.CarbonPotTemp",
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|
"addr": 74,
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"write_addr": 74,
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"count": 2,
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"type": "float32",
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"access": "R",
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"description": "LOOP #1 CarbonPotTemp",
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"archive": false
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},
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{
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"tag": "FICQ-9101.GAIN",
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"addr": 76,
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|
"write_addr": 76,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Gain1",
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|
"archive": false
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},
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{
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"tag": "FICQ-9101.Direction",
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"addr": 78,
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"write_addr": 78,
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"count": 2,
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"type": "float32",
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|
"access": "R",
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|
"description": "LOOP #1 Direction",
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"archive": false
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},
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|
{
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"tag": "FICQ-9101.RESET",
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|
"addr": 80,
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|
"write_addr": 80,
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|
"count": 2,
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"type": "float32",
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|
"access": "RW",
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"description": "LOOP #1 Reset1",
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|
"archive": false
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|
},
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|
{
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"tag": "FICQ-9101.RATE",
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|
"addr": 82,
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|
"write_addr": 82,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 Rate1",
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|
"archive": false
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|
},
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|
{
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|
"tag": "FICQ-9101.CycleTime1",
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|
"addr": 84,
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|
"write_addr": 84,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "R",
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|
"description": "LOOP #1 CycleTime1",
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|
"archive": false
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|
},
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|
{
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|
"tag": "FICQ-9101.PV_LowRange",
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|
"addr": 86,
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|
"write_addr": 86,
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"count": 2,
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|
"type": "float32",
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"access": "R",
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|
"description": "LOOP #1 PV_LowRange",
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"archive": false
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},
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{
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"tag": "FICQ-9101.PV_HighRange",
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"addr": 88,
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"write_addr": 88,
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"count": 2,
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|
"type": "float32",
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|
"access": "R",
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|
"description": "LOOP #1 PV_HighRange",
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"archive": false
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|
},
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{
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|
"tag": "FICQ-9101.Alarm1SP1",
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|
"addr": 90,
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|
"write_addr": 90,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 Alarm1SP1",
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|
"archive": false
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|
},
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|
{
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|
"tag": "FICQ-9101.Alarm1SP2",
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|
"addr": 92,
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|
"write_addr": 92,
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|
"count": 2,
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|
"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Alarm1SP2",
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"archive": false
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},
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|
{
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"tag": "FICQ-9101.Gain2",
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|
"addr": 96,
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|
"write_addr": 96,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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"description": "LOOP #1 Gain2",
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|
"archive": false
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|
},
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|
{
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|
"tag": "FICQ-9101.StepDeadband",
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|
"addr": 98,
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|
"write_addr": 98,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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"description": "LOOP #1 StepDeadband",
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|
"archive": false
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},
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{
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"tag": "FICQ-9101.Reset2",
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"addr": 100,
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"write_addr": 100,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Reset2",
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"archive": false
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|
},
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{
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"tag": "FICQ-9101.Rate2",
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|
"addr": 102,
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|
"write_addr": 102,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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"description": "LOOP #1 Rate2",
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"archive": false
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},
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{
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"tag": "FICQ-9101.CycleTime2",
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"addr": 104,
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"write_addr": 104,
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"count": 2,
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|
"type": "float32",
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"access": "R",
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"description": "LOOP #1 CycleTime2",
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"archive": false
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},
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{
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"tag": "FICQ-9101.LSP1",
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"addr": 106,
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"write_addr": 106,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 LSP1",
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"archive": false
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},
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{
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"tag": "FICQ-9101.LSP2",
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"addr": 108,
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|
"write_addr": 108,
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"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 LSP2",
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"archive": false
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|
},
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|
{
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|
"tag": "FICQ-9101.Alarm2SP1",
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"addr": 110,
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"write_addr": 110,
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"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 Alarm2SP1",
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"archive": false
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},
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{
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"tag": "FICQ-9101.Alarm2SP2",
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"addr": 112,
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"write_addr": 112,
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"count": 2,
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"type": "float32",
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|
"access": "RW",
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"description": "LOOP #1 Alarm2SP2",
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|
"archive": false
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|
},
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|
{
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|
"tag": "FICQ-9101.SP_LowLimit",
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|
"addr": 116,
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|
"write_addr": 116,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 SP_LowLimit",
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"archive": false
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},
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{
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"tag": "FICQ-9101.SP_HighLimit",
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"addr": 118,
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"write_addr": 118,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 SP_HighLimit",
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"archive": false
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},
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{
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"tag": "FICQ-9101.WSP_B",
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"addr": 120,
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|
"write_addr": 120,
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"count": 2,
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|
"type": "float32",
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"access": "RW",
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"description": "LOOP #1 WSP_B",
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"archive": false
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|
},
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{
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"tag": "FICQ-9101.Output_LowLimit",
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|
"addr": 122,
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|
"write_addr": 122,
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|
"count": 2,
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|
"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Output_LowLimit",
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"archive": false
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},
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{
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"tag": "FICQ-9101.Output_HighLimit",
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"addr": 124,
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"write_addr": 124,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Output_HighLimit",
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|
"archive": false
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},
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{
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|
"tag": "FICQ-9101.OP",
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|
"addr": 126,
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|
"write_addr": 126,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 OPWORK",
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|
"archive": true
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|
},
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|
{
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|
"tag": "FICQ-9101.Ratio",
|
|
"addr": 134,
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|
"write_addr": 134,
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"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 Ratio",
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|
"archive": false
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|
},
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|
{
|
|
"tag": "FICQ-9101.Bias",
|
|
"addr": 136,
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|
"write_addr": 136,
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|
"count": 2,
|
|
"type": "float32",
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|
"access": "RW",
|
|
"description": "LOOP #1 Bias",
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|
"archive": false
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|
},
|
|
{
|
|
"tag": "FICQ-9101.Deviation",
|
|
"addr": 138,
|
|
"write_addr": 138,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #1 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9101.ManualReset",
|
|
"addr": 142,
|
|
"write_addr": 142,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #1 ManualReset",
|
|
"archive": false
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|
},
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|
{
|
|
"tag": "FICQ-9101.FeedforwardGain",
|
|
"addr": 144,
|
|
"write_addr": 144,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #1 FeedforwardGain",
|
|
"archive": false
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|
},
|
|
{
|
|
"tag": "FICQ-9101.LocalPctCO",
|
|
"addr": 146,
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|
"write_addr": 146,
|
|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 LocalPctCO",
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|
"archive": false
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},
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|
{
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|
"tag": "FICQ-9101.FurnaceFactor",
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|
"addr": 148,
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"write_addr": 148,
|
|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
|
|
"description": "LOOP #1 FurnaceFactor",
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|
"archive": false
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|
},
|
|
{
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|
"tag": "FICQ-9101.PercentHydrogen",
|
|
"addr": 150,
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|
"write_addr": 150,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 PercentHydrogen",
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|
"archive": false
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|
},
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|
{
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|
"tag": "FICQ-9101.OnOffHysteresis",
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"addr": 152,
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"write_addr": 152,
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"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 OnOffHysteresis",
|
|
"archive": false
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|
},
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|
{
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|
"tag": "FICQ-9101.CarbPotDewpt",
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|
"addr": 154,
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|
"write_addr": 154,
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|
"count": 2,
|
|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
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|
"tag": "FICQ-9101.StepMotorTime",
|
|
"addr": 156,
|
|
"write_addr": 156,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #1 StepMotorTime",
|
|
"archive": false
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|
},
|
|
{
|
|
"tag": "FICQ-9101.FuzzyEnable",
|
|
"addr": 247,
|
|
"write_addr": 247,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #1 FuzzyEnable",
|
|
"archive": false
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|
},
|
|
{
|
|
"tag": "FICQ-9101.DemandTune",
|
|
"addr": 248,
|
|
"write_addr": 248,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #1 DemandTune",
|
|
"archive": false
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|
},
|
|
{
|
|
"tag": "FICQ-9101.AntiSootEnable",
|
|
"addr": 249,
|
|
"write_addr": 249,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #1 AntiSootEnable",
|
|
"archive": false
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|
},
|
|
{
|
|
"tag": "FICQ-9101.AutoManState",
|
|
"addr": 250,
|
|
"write_addr": 250,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #1 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9101.SP_SelectState",
|
|
"addr": 251,
|
|
"write_addr": 251,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #1 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9101.RemLocSPState",
|
|
"addr": 252,
|
|
"write_addr": 252,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #1 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9101.TuneSetState",
|
|
"addr": 253,
|
|
"write_addr": 253,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #1 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9101.MD",
|
|
"addr": 254,
|
|
"write_addr": 250,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #1 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9114.PV",
|
|
"addr": 320,
|
|
"write_addr": 320,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #2 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9114.RSP_SP2",
|
|
"addr": 322,
|
|
"write_addr": 322,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #2 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9114.SP",
|
|
"addr": 324,
|
|
"write_addr": 324,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #2 WSP",
|
|
"archive": true
|
|
},
|
|
{
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{
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{
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{
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{
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|
{
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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{
|
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|
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|
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"archive": false
|
|
},
|
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{
|
|
"tag": "FICQ-9116.Output_LowLimit",
|
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|
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|
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"archive": false
|
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},
|
|
{
|
|
"tag": "FICQ-9116.Output_HighLimit",
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"archive": false
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{
|
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"tag": "FICQ-9116.OP",
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"archive": true
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{
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{
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{
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"tag": "FICQ-9116.Deviation",
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{
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{
|
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"tag": "FICQ-9116.FeedforwardGain",
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|
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|
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|
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},
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{
|
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"tag": "FICQ-9116.LocalPctCO",
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|
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"archive": false
|
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{
|
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{
|
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"count": 2,
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"access": "RW",
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{
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},
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{
|
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"tag": "FICQ-9116.CarbPotDewpt",
|
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"count": 2,
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"type": "float32",
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"access": "RW",
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|
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"archive": false
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{
|
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"access": "RW",
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|
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{
|
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"archive": false
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{
|
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|
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"count": 1,
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|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #5 DemandTune",
|
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"archive": false
|
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},
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{
|
|
"tag": "FICQ-9116.AntiSootEnable",
|
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|
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|
|
"count": 1,
|
|
"type": "uint16",
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|
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"archive": false
|
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{
|
|
"tag": "FICQ-9116.AutoManState",
|
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|
|
"access": "RW",
|
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"archive": false
|
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{
|
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"tag": "FICQ-9116.SP_SelectState",
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|
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|
|
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|
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"archive": false
|
|
},
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{
|
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{
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{
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{
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{
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|
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{
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|
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{
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|
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{
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{
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{
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|
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|
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|
{
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|
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|
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|
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|
{
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|
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|
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{
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|
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|
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|
{
|
|
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|
|
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|
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|
|
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{
|
|
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|
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|
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|
|
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|
|
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|
|
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|
|
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|
{
|
|
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|
|
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|
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|
|
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|
|
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|
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|
|
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|
|
"archive": false
|
|
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|
{
|
|
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|
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|
|
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|
|
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|
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|
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|
|
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|
|
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|
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|
{
|
|
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|
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|
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|
|
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|
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|
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|
|
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|
|
"archive": false
|
|
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|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
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|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
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|
|
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|
|
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|
|
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|
{
|
|
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|
|
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|
|
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|
|
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|
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|
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|
|
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|
|
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|
|
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|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
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|
|
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|
|
"archive": false
|
|
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|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
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|
|
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|
|
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|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
},
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|
{
|
|
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|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
{
|
|
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|
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|
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|
|
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|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.Bias",
|
|
"addr": 1416,
|
|
"write_addr": 1416,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.Deviation",
|
|
"addr": 1418,
|
|
"write_addr": 1418,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #6 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.ManualReset",
|
|
"addr": 1422,
|
|
"write_addr": 1422,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.FeedforwardGain",
|
|
"addr": 1424,
|
|
"write_addr": 1424,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.LocalPctCO",
|
|
"addr": 1426,
|
|
"write_addr": 1426,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.FurnaceFactor",
|
|
"addr": 1428,
|
|
"write_addr": 1428,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.PercentHydrogen",
|
|
"addr": 1430,
|
|
"write_addr": 1430,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.OnOffHysteresis",
|
|
"addr": 1432,
|
|
"write_addr": 1432,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.CarbPotDewpt",
|
|
"addr": 1434,
|
|
"write_addr": 1434,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.StepMotorTime",
|
|
"addr": 1436,
|
|
"write_addr": 1436,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.FuzzyEnable",
|
|
"addr": 1527,
|
|
"write_addr": 1527,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.DemandTune",
|
|
"addr": 1528,
|
|
"write_addr": 1528,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.AntiSootEnable",
|
|
"addr": 1529,
|
|
"write_addr": 1529,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.AutoManState",
|
|
"addr": 1530,
|
|
"write_addr": 1530,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.SP_SelectState",
|
|
"addr": 1531,
|
|
"write_addr": 1531,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.RemLocSPState",
|
|
"addr": 1532,
|
|
"write_addr": 1532,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.TuneSetState",
|
|
"addr": 1533,
|
|
"write_addr": 1533,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9111A.MD",
|
|
"addr": 1534,
|
|
"write_addr": 1530,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #6 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.PV",
|
|
"addr": 1600,
|
|
"write_addr": 1600,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.RSP_SP2",
|
|
"addr": 1602,
|
|
"write_addr": 1602,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.SP",
|
|
"addr": 1604,
|
|
"write_addr": 1604,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Output",
|
|
"addr": 1606,
|
|
"write_addr": 1606,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.PV_B",
|
|
"addr": 1608,
|
|
"write_addr": 1608,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.CarbonPotTemp",
|
|
"addr": 1610,
|
|
"write_addr": 1610,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.GAIN",
|
|
"addr": 1612,
|
|
"write_addr": 1612,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Direction",
|
|
"addr": 1614,
|
|
"write_addr": 1614,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.RESET",
|
|
"addr": 1616,
|
|
"write_addr": 1616,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.RATE",
|
|
"addr": 1618,
|
|
"write_addr": 1618,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.CycleTime1",
|
|
"addr": 1620,
|
|
"write_addr": 1620,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.PV_LowRange",
|
|
"addr": 1622,
|
|
"write_addr": 1622,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.PV_HighRange",
|
|
"addr": 1624,
|
|
"write_addr": 1624,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Alarm1SP1",
|
|
"addr": 1626,
|
|
"write_addr": 1626,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.AL1SP1",
|
|
"addr": 1626,
|
|
"write_addr": 1626,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Alarm1SP2",
|
|
"addr": 1628,
|
|
"write_addr": 1628,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Gain2",
|
|
"addr": 1632,
|
|
"write_addr": 1632,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.StepDeadband",
|
|
"addr": 1634,
|
|
"write_addr": 1634,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Reset2",
|
|
"addr": 1636,
|
|
"write_addr": 1636,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Rate2",
|
|
"addr": 1638,
|
|
"write_addr": 1638,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.CycleTime2",
|
|
"addr": 1640,
|
|
"write_addr": 1640,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.LSP1",
|
|
"addr": 1642,
|
|
"write_addr": 1642,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.LSP2",
|
|
"addr": 1644,
|
|
"write_addr": 1644,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Alarm2SP1",
|
|
"addr": 1646,
|
|
"write_addr": 1646,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.AL2SP1",
|
|
"addr": 1646,
|
|
"write_addr": 1646,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Alarm2SP2",
|
|
"addr": 1648,
|
|
"write_addr": 1648,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.SP_LowLimit",
|
|
"addr": 1652,
|
|
"write_addr": 1652,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.SP_HighLimit",
|
|
"addr": 1654,
|
|
"write_addr": 1654,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.WSP_B",
|
|
"addr": 1656,
|
|
"write_addr": 1656,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Output_LowLimit",
|
|
"addr": 1658,
|
|
"write_addr": 1658,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Output_HighLimit",
|
|
"addr": 1660,
|
|
"write_addr": 1660,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.OP",
|
|
"addr": 1662,
|
|
"write_addr": 1662,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Ratio",
|
|
"addr": 1670,
|
|
"write_addr": 1670,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Bias",
|
|
"addr": 1672,
|
|
"write_addr": 1672,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.Deviation",
|
|
"addr": 1674,
|
|
"write_addr": 1674,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.ManualReset",
|
|
"addr": 1678,
|
|
"write_addr": 1678,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.FeedforwardGain",
|
|
"addr": 1680,
|
|
"write_addr": 1680,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.LocalPctCO",
|
|
"addr": 1682,
|
|
"write_addr": 1682,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.FurnaceFactor",
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"write_addr": 1684,
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|
"count": 2,
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|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.PercentHydrogen",
|
|
"addr": 1686,
|
|
"write_addr": 1686,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.OnOffHysteresis",
|
|
"addr": 1688,
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"write_addr": 1688,
|
|
"count": 2,
|
|
"type": "float32",
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|
"access": "RW",
|
|
"description": "LOOP #7 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.CarbPotDewpt",
|
|
"addr": 1690,
|
|
"write_addr": 1690,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.StepMotorTime",
|
|
"addr": 1692,
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|
"write_addr": 1692,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.FuzzyEnable",
|
|
"addr": 1783,
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"write_addr": 1783,
|
|
"count": 1,
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|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.DemandTune",
|
|
"addr": 1784,
|
|
"write_addr": 1784,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.AntiSootEnable",
|
|
"addr": 1785,
|
|
"write_addr": 1785,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.AutoManState",
|
|
"addr": 1786,
|
|
"write_addr": 1786,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.SP_SelectState",
|
|
"addr": 1787,
|
|
"write_addr": 1787,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.RemLocSPState",
|
|
"addr": 1788,
|
|
"write_addr": 1788,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.TuneSetState",
|
|
"addr": 1789,
|
|
"write_addr": 1789,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9111A.MD",
|
|
"addr": 1790,
|
|
"write_addr": 1786,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #7 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.PV",
|
|
"addr": 1856,
|
|
"write_addr": 1856,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.RSP_SP2",
|
|
"addr": 1858,
|
|
"write_addr": 1858,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.SP",
|
|
"addr": 1860,
|
|
"write_addr": 1860,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Output",
|
|
"addr": 1862,
|
|
"write_addr": 1862,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.PV_B",
|
|
"addr": 1864,
|
|
"write_addr": 1864,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.CarbonPotTemp",
|
|
"addr": 1866,
|
|
"write_addr": 1866,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.GAIN",
|
|
"addr": 1868,
|
|
"write_addr": 1868,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Direction",
|
|
"addr": 1870,
|
|
"write_addr": 1870,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.RESET",
|
|
"addr": 1872,
|
|
"write_addr": 1872,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.RATE",
|
|
"addr": 1874,
|
|
"write_addr": 1874,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.CycleTime1",
|
|
"addr": 1876,
|
|
"write_addr": 1876,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.PV_LowRange",
|
|
"addr": 1878,
|
|
"write_addr": 1878,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.PV_HighRange",
|
|
"addr": 1880,
|
|
"write_addr": 1880,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Alarm1SP1",
|
|
"addr": 1882,
|
|
"write_addr": 1882,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Alarm1SP2",
|
|
"addr": 1884,
|
|
"write_addr": 1884,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Gain2",
|
|
"addr": 1888,
|
|
"write_addr": 1888,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.StepDeadband",
|
|
"addr": 1890,
|
|
"write_addr": 1890,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Reset2",
|
|
"addr": 1892,
|
|
"write_addr": 1892,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Rate2",
|
|
"addr": 1894,
|
|
"write_addr": 1894,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.CycleTime2",
|
|
"addr": 1896,
|
|
"write_addr": 1896,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.LSP1",
|
|
"addr": 1898,
|
|
"write_addr": 1898,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.LSP2",
|
|
"addr": 1900,
|
|
"write_addr": 1900,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Alarm2SP1",
|
|
"addr": 1902,
|
|
"write_addr": 1902,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Alarm2SP2",
|
|
"addr": 1904,
|
|
"write_addr": 1904,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.SP_LowLimit",
|
|
"addr": 1908,
|
|
"write_addr": 1908,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.SP_HighLimit",
|
|
"addr": 1910,
|
|
"write_addr": 1910,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.WSP_B",
|
|
"addr": 1912,
|
|
"write_addr": 1912,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Output_LowLimit",
|
|
"addr": 1914,
|
|
"write_addr": 1914,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Output_HighLimit",
|
|
"addr": 1916,
|
|
"write_addr": 1916,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.OP",
|
|
"addr": 1918,
|
|
"write_addr": 1918,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Ratio",
|
|
"addr": 1926,
|
|
"write_addr": 1926,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Bias",
|
|
"addr": 1928,
|
|
"write_addr": 1928,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.Deviation",
|
|
"addr": 1930,
|
|
"write_addr": 1930,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.ManualReset",
|
|
"addr": 1934,
|
|
"write_addr": 1934,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.FeedforwardGain",
|
|
"addr": 1936,
|
|
"write_addr": 1936,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.LocalPctCO",
|
|
"addr": 1938,
|
|
"write_addr": 1938,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.FurnaceFactor",
|
|
"addr": 1940,
|
|
"write_addr": 1940,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.PercentHydrogen",
|
|
"addr": 1942,
|
|
"write_addr": 1942,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.OnOffHysteresis",
|
|
"addr": 1944,
|
|
"write_addr": 1944,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.CarbPotDewpt",
|
|
"addr": 1946,
|
|
"write_addr": 1946,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.StepMotorTime",
|
|
"addr": 1948,
|
|
"write_addr": 1948,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.FuzzyEnable",
|
|
"addr": 2039,
|
|
"write_addr": 2039,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.DemandTune",
|
|
"addr": 2040,
|
|
"write_addr": 2040,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.AntiSootEnable",
|
|
"addr": 2041,
|
|
"write_addr": 2041,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.AutoManState",
|
|
"addr": 2042,
|
|
"write_addr": 2042,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.SP_SelectState",
|
|
"addr": 2043,
|
|
"write_addr": 2043,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.RemLocSPState",
|
|
"addr": 2044,
|
|
"write_addr": 2044,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.TuneSetState",
|
|
"addr": 2045,
|
|
"write_addr": 2045,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.MD",
|
|
"addr": 2046,
|
|
"write_addr": 2042,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #8 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.PV",
|
|
"addr": 2112,
|
|
"write_addr": 2112,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.RSP_SP2",
|
|
"addr": 2114,
|
|
"write_addr": 2114,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.SP",
|
|
"addr": 2116,
|
|
"write_addr": 2116,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Output",
|
|
"addr": 2118,
|
|
"write_addr": 2118,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.PV_B",
|
|
"addr": 2120,
|
|
"write_addr": 2120,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.CarbonPotTemp",
|
|
"addr": 2122,
|
|
"write_addr": 2122,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.GAIN",
|
|
"addr": 2124,
|
|
"write_addr": 2124,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Direction",
|
|
"addr": 2126,
|
|
"write_addr": 2126,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.RESET",
|
|
"addr": 2128,
|
|
"write_addr": 2128,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.RATE",
|
|
"addr": 2130,
|
|
"write_addr": 2130,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.CycleTime1",
|
|
"addr": 2132,
|
|
"write_addr": 2132,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.PV_LowRange",
|
|
"addr": 2134,
|
|
"write_addr": 2134,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.PV_HighRange",
|
|
"addr": 2136,
|
|
"write_addr": 2136,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Alarm1SP1",
|
|
"addr": 2138,
|
|
"write_addr": 2138,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Alarm1SP2",
|
|
"addr": 2140,
|
|
"write_addr": 2140,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Gain2",
|
|
"addr": 2144,
|
|
"write_addr": 2144,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.StepDeadband",
|
|
"addr": 2146,
|
|
"write_addr": 2146,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Reset2",
|
|
"addr": 2148,
|
|
"write_addr": 2148,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Rate2",
|
|
"addr": 2150,
|
|
"write_addr": 2150,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.CycleTime2",
|
|
"addr": 2152,
|
|
"write_addr": 2152,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.LSP1",
|
|
"addr": 2154,
|
|
"write_addr": 2154,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.LSP2",
|
|
"addr": 2156,
|
|
"write_addr": 2156,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Alarm2SP1",
|
|
"addr": 2158,
|
|
"write_addr": 2158,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Alarm2SP2",
|
|
"addr": 2160,
|
|
"write_addr": 2160,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.SP_LowLimit",
|
|
"addr": 2164,
|
|
"write_addr": 2164,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.SP_HighLimit",
|
|
"addr": 2166,
|
|
"write_addr": 2166,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.WSP_B",
|
|
"addr": 2168,
|
|
"write_addr": 2168,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Output_LowLimit",
|
|
"addr": 2170,
|
|
"write_addr": 2170,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Output_HighLimit",
|
|
"addr": 2172,
|
|
"write_addr": 2172,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.OP",
|
|
"addr": 2174,
|
|
"write_addr": 2174,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Ratio",
|
|
"addr": 2182,
|
|
"write_addr": 2182,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Bias",
|
|
"addr": 2184,
|
|
"write_addr": 2184,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.Deviation",
|
|
"addr": 2186,
|
|
"write_addr": 2186,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.ManualReset",
|
|
"addr": 2190,
|
|
"write_addr": 2190,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.FeedforwardGain",
|
|
"addr": 2192,
|
|
"write_addr": 2192,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.LocalPctCO",
|
|
"addr": 2194,
|
|
"write_addr": 2194,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.FurnaceFactor",
|
|
"addr": 2196,
|
|
"write_addr": 2196,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.PercentHydrogen",
|
|
"addr": 2198,
|
|
"write_addr": 2198,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.OnOffHysteresis",
|
|
"addr": 2200,
|
|
"write_addr": 2200,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.CarbPotDewpt",
|
|
"addr": 2202,
|
|
"write_addr": 2202,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.StepMotorTime",
|
|
"addr": 2204,
|
|
"write_addr": 2204,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.FuzzyEnable",
|
|
"addr": 2295,
|
|
"write_addr": 2295,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.DemandTune",
|
|
"addr": 2296,
|
|
"write_addr": 2296,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.AntiSootEnable",
|
|
"addr": 2297,
|
|
"write_addr": 2297,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.AutoManState",
|
|
"addr": 2298,
|
|
"write_addr": 2298,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.SP_SelectState",
|
|
"addr": 2299,
|
|
"write_addr": 2299,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.RemLocSPState",
|
|
"addr": 2300,
|
|
"write_addr": 2300,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.TuneSetState",
|
|
"addr": 2301,
|
|
"write_addr": 2301,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.MD",
|
|
"addr": 2302,
|
|
"write_addr": 2298,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #9 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.PV",
|
|
"addr": 2368,
|
|
"write_addr": 2368,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.RSP_SP2",
|
|
"addr": 2370,
|
|
"write_addr": 2370,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.SP",
|
|
"addr": 2372,
|
|
"write_addr": 2372,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Output",
|
|
"addr": 2374,
|
|
"write_addr": 2374,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.PV_B",
|
|
"addr": 2376,
|
|
"write_addr": 2376,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.CarbonPotTemp",
|
|
"addr": 2378,
|
|
"write_addr": 2378,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.GAIN",
|
|
"addr": 2380,
|
|
"write_addr": 2380,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Direction",
|
|
"addr": 2382,
|
|
"write_addr": 2382,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.RESET",
|
|
"addr": 2384,
|
|
"write_addr": 2384,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.RATE",
|
|
"addr": 2386,
|
|
"write_addr": 2386,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.CycleTime1",
|
|
"addr": 2388,
|
|
"write_addr": 2388,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.PV_LowRange",
|
|
"addr": 2390,
|
|
"write_addr": 2390,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.PV_HighRange",
|
|
"addr": 2392,
|
|
"write_addr": 2392,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Alarm1SP1",
|
|
"addr": 2394,
|
|
"write_addr": 2394,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Alarm1SP2",
|
|
"addr": 2396,
|
|
"write_addr": 2396,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Gain2",
|
|
"addr": 2400,
|
|
"write_addr": 2400,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.StepDeadband",
|
|
"addr": 2402,
|
|
"write_addr": 2402,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Reset2",
|
|
"addr": 2404,
|
|
"write_addr": 2404,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Rate2",
|
|
"addr": 2406,
|
|
"write_addr": 2406,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.CycleTime2",
|
|
"addr": 2408,
|
|
"write_addr": 2408,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.LSP1",
|
|
"addr": 2410,
|
|
"write_addr": 2410,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.LSP2",
|
|
"addr": 2412,
|
|
"write_addr": 2412,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Alarm2SP1",
|
|
"addr": 2414,
|
|
"write_addr": 2414,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Alarm2SP2",
|
|
"addr": 2416,
|
|
"write_addr": 2416,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.SP_LowLimit",
|
|
"addr": 2420,
|
|
"write_addr": 2420,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.SP_HighLimit",
|
|
"addr": 2422,
|
|
"write_addr": 2422,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.WSP_B",
|
|
"addr": 2424,
|
|
"write_addr": 2424,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Output_LowLimit",
|
|
"addr": 2426,
|
|
"write_addr": 2426,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Output_HighLimit",
|
|
"addr": 2428,
|
|
"write_addr": 2428,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.OP",
|
|
"addr": 2430,
|
|
"write_addr": 2430,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Ratio",
|
|
"addr": 2438,
|
|
"write_addr": 2438,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Bias",
|
|
"addr": 2440,
|
|
"write_addr": 2440,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.Deviation",
|
|
"addr": 2442,
|
|
"write_addr": 2442,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.ManualReset",
|
|
"addr": 2446,
|
|
"write_addr": 2446,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.FeedforwardGain",
|
|
"addr": 2448,
|
|
"write_addr": 2448,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.LocalPctCO",
|
|
"addr": 2450,
|
|
"write_addr": 2450,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.FurnaceFactor",
|
|
"addr": 2452,
|
|
"write_addr": 2452,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.PercentHydrogen",
|
|
"addr": 2454,
|
|
"write_addr": 2454,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.OnOffHysteresis",
|
|
"addr": 2456,
|
|
"write_addr": 2456,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.CarbPotDewpt",
|
|
"addr": 2458,
|
|
"write_addr": 2458,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.StepMotorTime",
|
|
"addr": 2460,
|
|
"write_addr": 2460,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.FuzzyEnable",
|
|
"addr": 2551,
|
|
"write_addr": 2551,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.DemandTune",
|
|
"addr": 2552,
|
|
"write_addr": 2552,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.AntiSootEnable",
|
|
"addr": 2553,
|
|
"write_addr": 2553,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.AutoManState",
|
|
"addr": 2554,
|
|
"write_addr": 2554,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.SP_SelectState",
|
|
"addr": 2555,
|
|
"write_addr": 2555,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.RemLocSPState",
|
|
"addr": 2556,
|
|
"write_addr": 2556,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.TuneSetState",
|
|
"addr": 2557,
|
|
"write_addr": 2557,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.MD",
|
|
"addr": 2558,
|
|
"write_addr": 2554,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #10 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.PV",
|
|
"addr": 2624,
|
|
"write_addr": 2624,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.RSP_SP2",
|
|
"addr": 2626,
|
|
"write_addr": 2626,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.SP",
|
|
"addr": 2628,
|
|
"write_addr": 2628,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Output",
|
|
"addr": 2630,
|
|
"write_addr": 2630,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.PV_B",
|
|
"addr": 2632,
|
|
"write_addr": 2632,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.CarbonPotTemp",
|
|
"addr": 2634,
|
|
"write_addr": 2634,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.GAIN",
|
|
"addr": 2636,
|
|
"write_addr": 2636,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Direction",
|
|
"addr": 2638,
|
|
"write_addr": 2638,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.RESET",
|
|
"addr": 2640,
|
|
"write_addr": 2640,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.RATE",
|
|
"addr": 2642,
|
|
"write_addr": 2642,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.CycleTime1",
|
|
"addr": 2644,
|
|
"write_addr": 2644,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.PV_LowRange",
|
|
"addr": 2646,
|
|
"write_addr": 2646,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.PV_HighRange",
|
|
"addr": 2648,
|
|
"write_addr": 2648,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Alarm1SP1",
|
|
"addr": 2650,
|
|
"write_addr": 2650,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Alarm1SP2",
|
|
"addr": 2652,
|
|
"write_addr": 2652,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Gain2",
|
|
"addr": 2656,
|
|
"write_addr": 2656,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.StepDeadband",
|
|
"addr": 2658,
|
|
"write_addr": 2658,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Reset2",
|
|
"addr": 2660,
|
|
"write_addr": 2660,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Rate2",
|
|
"addr": 2662,
|
|
"write_addr": 2662,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.CycleTime2",
|
|
"addr": 2664,
|
|
"write_addr": 2664,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.LSP1",
|
|
"addr": 2666,
|
|
"write_addr": 2666,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.LSP2",
|
|
"addr": 2668,
|
|
"write_addr": 2668,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Alarm2SP1",
|
|
"addr": 2670,
|
|
"write_addr": 2670,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Alarm2SP2",
|
|
"addr": 2672,
|
|
"write_addr": 2672,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.SP_LowLimit",
|
|
"addr": 2676,
|
|
"write_addr": 2676,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.SP_HighLimit",
|
|
"addr": 2678,
|
|
"write_addr": 2678,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.WSP_B",
|
|
"addr": 2680,
|
|
"write_addr": 2680,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Output_LowLimit",
|
|
"addr": 2682,
|
|
"write_addr": 2682,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Output_HighLimit",
|
|
"addr": 2684,
|
|
"write_addr": 2684,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.OP",
|
|
"addr": 2686,
|
|
"write_addr": 2686,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Ratio",
|
|
"addr": 2694,
|
|
"write_addr": 2694,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Bias",
|
|
"addr": 2696,
|
|
"write_addr": 2696,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.Deviation",
|
|
"addr": 2698,
|
|
"write_addr": 2698,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.ManualReset",
|
|
"addr": 2702,
|
|
"write_addr": 2702,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.FeedforwardGain",
|
|
"addr": 2704,
|
|
"write_addr": 2704,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.LocalPctCO",
|
|
"addr": 2706,
|
|
"write_addr": 2706,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.FurnaceFactor",
|
|
"addr": 2708,
|
|
"write_addr": 2708,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.PercentHydrogen",
|
|
"addr": 2710,
|
|
"write_addr": 2710,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.OnOffHysteresis",
|
|
"addr": 2712,
|
|
"write_addr": 2712,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.CarbPotDewpt",
|
|
"addr": 2714,
|
|
"write_addr": 2714,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.StepMotorTime",
|
|
"addr": 2716,
|
|
"write_addr": 2716,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.FuzzyEnable",
|
|
"addr": 2807,
|
|
"write_addr": 2807,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.DemandTune",
|
|
"addr": 2808,
|
|
"write_addr": 2808,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.AntiSootEnable",
|
|
"addr": 2809,
|
|
"write_addr": 2809,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.AutoManState",
|
|
"addr": 2810,
|
|
"write_addr": 2810,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.SP_SelectState",
|
|
"addr": 2811,
|
|
"write_addr": 2811,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.RemLocSPState",
|
|
"addr": 2812,
|
|
"write_addr": 2812,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.TuneSetState",
|
|
"addr": 2813,
|
|
"write_addr": 2813,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.MD",
|
|
"addr": 2814,
|
|
"write_addr": 2810,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #11 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.PV",
|
|
"addr": 2880,
|
|
"write_addr": 2880,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.RSP_SP2",
|
|
"addr": 2882,
|
|
"write_addr": 2882,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.SP",
|
|
"addr": 2884,
|
|
"write_addr": 2884,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Output",
|
|
"addr": 2886,
|
|
"write_addr": 2886,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.PV_B",
|
|
"addr": 2888,
|
|
"write_addr": 2888,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.CarbonPotTemp",
|
|
"addr": 2890,
|
|
"write_addr": 2890,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.GAIN",
|
|
"addr": 2892,
|
|
"write_addr": 2892,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Direction",
|
|
"addr": 2894,
|
|
"write_addr": 2894,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.RESET",
|
|
"addr": 2896,
|
|
"write_addr": 2896,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.RATE",
|
|
"addr": 2898,
|
|
"write_addr": 2898,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.CycleTime1",
|
|
"addr": 2900,
|
|
"write_addr": 2900,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.PV_LowRange",
|
|
"addr": 2902,
|
|
"write_addr": 2902,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.PV_HighRange",
|
|
"addr": 2904,
|
|
"write_addr": 2904,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Alarm1SP1",
|
|
"addr": 2906,
|
|
"write_addr": 2906,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Alarm1SP2",
|
|
"addr": 2908,
|
|
"write_addr": 2908,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Gain2",
|
|
"addr": 2912,
|
|
"write_addr": 2912,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.StepDeadband",
|
|
"addr": 2914,
|
|
"write_addr": 2914,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Reset2",
|
|
"addr": 2916,
|
|
"write_addr": 2916,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Rate2",
|
|
"addr": 2918,
|
|
"write_addr": 2918,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.CycleTime2",
|
|
"addr": 2920,
|
|
"write_addr": 2920,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.LSP1",
|
|
"addr": 2922,
|
|
"write_addr": 2922,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.LSP2",
|
|
"addr": 2924,
|
|
"write_addr": 2924,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Alarm2SP1",
|
|
"addr": 2926,
|
|
"write_addr": 2926,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Alarm2SP2",
|
|
"addr": 2928,
|
|
"write_addr": 2928,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.SP_LowLimit",
|
|
"addr": 2932,
|
|
"write_addr": 2932,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.SP_HighLimit",
|
|
"addr": 2934,
|
|
"write_addr": 2934,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.WSP_B",
|
|
"addr": 2936,
|
|
"write_addr": 2936,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Output_LowLimit",
|
|
"addr": 2938,
|
|
"write_addr": 2938,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Output_HighLimit",
|
|
"addr": 2940,
|
|
"write_addr": 2940,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.OP",
|
|
"addr": 2942,
|
|
"write_addr": 2942,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Ratio",
|
|
"addr": 2950,
|
|
"write_addr": 2950,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Bias",
|
|
"addr": 2952,
|
|
"write_addr": 2952,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.Deviation",
|
|
"addr": 2954,
|
|
"write_addr": 2954,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.ManualReset",
|
|
"addr": 2958,
|
|
"write_addr": 2958,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.FeedforwardGain",
|
|
"addr": 2960,
|
|
"write_addr": 2960,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.LocalPctCO",
|
|
"addr": 2962,
|
|
"write_addr": 2962,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.FurnaceFactor",
|
|
"addr": 2964,
|
|
"write_addr": 2964,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.PercentHydrogen",
|
|
"addr": 2966,
|
|
"write_addr": 2966,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.OnOffHysteresis",
|
|
"addr": 2968,
|
|
"write_addr": 2968,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.CarbPotDewpt",
|
|
"addr": 2970,
|
|
"write_addr": 2970,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.StepMotorTime",
|
|
"addr": 2972,
|
|
"write_addr": 2972,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.FuzzyEnable",
|
|
"addr": 3063,
|
|
"write_addr": 3063,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.DemandTune",
|
|
"addr": 3064,
|
|
"write_addr": 3064,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.AntiSootEnable",
|
|
"addr": 3065,
|
|
"write_addr": 3065,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.AutoManState",
|
|
"addr": 3066,
|
|
"write_addr": 3066,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.SP_SelectState",
|
|
"addr": 3067,
|
|
"write_addr": 3067,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.RemLocSPState",
|
|
"addr": 3068,
|
|
"write_addr": 3068,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.TuneSetState",
|
|
"addr": 3069,
|
|
"write_addr": 3069,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.MD",
|
|
"addr": 3070,
|
|
"write_addr": 3066,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #12 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.PV",
|
|
"addr": 3136,
|
|
"write_addr": 3136,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.RSP_SP2",
|
|
"addr": 3138,
|
|
"write_addr": 3138,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.SP",
|
|
"addr": 3140,
|
|
"write_addr": 3140,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Output",
|
|
"addr": 3142,
|
|
"write_addr": 3142,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.PV_B",
|
|
"addr": 3144,
|
|
"write_addr": 3144,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.CarbonPotTemp",
|
|
"addr": 3146,
|
|
"write_addr": 3146,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.GAIN",
|
|
"addr": 3148,
|
|
"write_addr": 3148,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Direction",
|
|
"addr": 3150,
|
|
"write_addr": 3150,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.RESET",
|
|
"addr": 3152,
|
|
"write_addr": 3152,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.RATE",
|
|
"addr": 3154,
|
|
"write_addr": 3154,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.CycleTime1",
|
|
"addr": 3156,
|
|
"write_addr": 3156,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.PV_LowRange",
|
|
"addr": 3158,
|
|
"write_addr": 3158,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.PV_HighRange",
|
|
"addr": 3160,
|
|
"write_addr": 3160,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Alarm1SP1",
|
|
"addr": 3162,
|
|
"write_addr": 3162,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.AL1SP1",
|
|
"addr": 3162,
|
|
"write_addr": 3162,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Alarm1SP2",
|
|
"addr": 3164,
|
|
"write_addr": 3164,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Gain2",
|
|
"addr": 3168,
|
|
"write_addr": 3168,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.StepDeadband",
|
|
"addr": 3170,
|
|
"write_addr": 3170,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Reset2",
|
|
"addr": 3172,
|
|
"write_addr": 3172,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Rate2",
|
|
"addr": 3174,
|
|
"write_addr": 3174,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.CycleTime2",
|
|
"addr": 3176,
|
|
"write_addr": 3176,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.LSP1",
|
|
"addr": 3178,
|
|
"write_addr": 3178,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.LSP2",
|
|
"addr": 3180,
|
|
"write_addr": 3180,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Alarm2SP1",
|
|
"addr": 3182,
|
|
"write_addr": 3182,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.AL2SP1",
|
|
"addr": 3182,
|
|
"write_addr": 3182,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Alarm2SP2",
|
|
"addr": 3184,
|
|
"write_addr": 3184,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.SP_LowLimit",
|
|
"addr": 3188,
|
|
"write_addr": 3188,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.SP_HighLimit",
|
|
"addr": 3190,
|
|
"write_addr": 3190,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.WSP_B",
|
|
"addr": 3192,
|
|
"write_addr": 3192,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Output_LowLimit",
|
|
"addr": 3194,
|
|
"write_addr": 3194,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Output_HighLimit",
|
|
"addr": 3196,
|
|
"write_addr": 3196,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.OP",
|
|
"addr": 3198,
|
|
"write_addr": 3198,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Ratio",
|
|
"addr": 3206,
|
|
"write_addr": 3206,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Bias",
|
|
"addr": 3208,
|
|
"write_addr": 3208,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.Deviation",
|
|
"addr": 3210,
|
|
"write_addr": 3210,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.ManualReset",
|
|
"addr": 3214,
|
|
"write_addr": 3214,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.FeedforwardGain",
|
|
"addr": 3216,
|
|
"write_addr": 3216,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.LocalPctCO",
|
|
"addr": 3218,
|
|
"write_addr": 3218,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.FurnaceFactor",
|
|
"addr": 3220,
|
|
"write_addr": 3220,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.PercentHydrogen",
|
|
"addr": 3222,
|
|
"write_addr": 3222,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.OnOffHysteresis",
|
|
"addr": 3224,
|
|
"write_addr": 3224,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.CarbPotDewpt",
|
|
"addr": 3226,
|
|
"write_addr": 3226,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.StepMotorTime",
|
|
"addr": 3228,
|
|
"write_addr": 3228,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.FuzzyEnable",
|
|
"addr": 3319,
|
|
"write_addr": 3319,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.DemandTune",
|
|
"addr": 3320,
|
|
"write_addr": 3320,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.AntiSootEnable",
|
|
"addr": 3321,
|
|
"write_addr": 3321,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.AutoManState",
|
|
"addr": 3322,
|
|
"write_addr": 3322,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.SP_SelectState",
|
|
"addr": 3323,
|
|
"write_addr": 3323,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.RemLocSPState",
|
|
"addr": 3324,
|
|
"write_addr": 3324,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.TuneSetState",
|
|
"addr": 3325,
|
|
"write_addr": 3325,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-9211A.MD",
|
|
"addr": 3326,
|
|
"write_addr": 3322,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #13 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.PV",
|
|
"addr": 3392,
|
|
"write_addr": 3392,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.RSP_SP2",
|
|
"addr": 3394,
|
|
"write_addr": 3394,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.SP",
|
|
"addr": 3396,
|
|
"write_addr": 3396,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Output",
|
|
"addr": 3398,
|
|
"write_addr": 3398,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.PV_B",
|
|
"addr": 3400,
|
|
"write_addr": 3400,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.CarbonPotTemp",
|
|
"addr": 3402,
|
|
"write_addr": 3402,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.GAIN",
|
|
"addr": 3404,
|
|
"write_addr": 3404,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Direction",
|
|
"addr": 3406,
|
|
"write_addr": 3406,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.RESET",
|
|
"addr": 3408,
|
|
"write_addr": 3408,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.RATE",
|
|
"addr": 3410,
|
|
"write_addr": 3410,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.CycleTime1",
|
|
"addr": 3412,
|
|
"write_addr": 3412,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.PV_LowRange",
|
|
"addr": 3414,
|
|
"write_addr": 3414,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.PV_HighRange",
|
|
"addr": 3416,
|
|
"write_addr": 3416,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Alarm1SP1",
|
|
"addr": 3418,
|
|
"write_addr": 3418,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.AL1SP1",
|
|
"addr": 3418,
|
|
"write_addr": 3418,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Alarm1SP2",
|
|
"addr": 3420,
|
|
"write_addr": 3420,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Gain2",
|
|
"addr": 3424,
|
|
"write_addr": 3424,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.StepDeadband",
|
|
"addr": 3426,
|
|
"write_addr": 3426,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Reset2",
|
|
"addr": 3428,
|
|
"write_addr": 3428,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Rate2",
|
|
"addr": 3430,
|
|
"write_addr": 3430,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.CycleTime2",
|
|
"addr": 3432,
|
|
"write_addr": 3432,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.LSP1",
|
|
"addr": 3434,
|
|
"write_addr": 3434,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.LSP2",
|
|
"addr": 3436,
|
|
"write_addr": 3436,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Alarm2SP1",
|
|
"addr": 3438,
|
|
"write_addr": 3438,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.AL2SP1",
|
|
"addr": 3438,
|
|
"write_addr": 3438,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Alarm2SP2",
|
|
"addr": 3440,
|
|
"write_addr": 3440,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.SP_LowLimit",
|
|
"addr": 3444,
|
|
"write_addr": 3444,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.SP_HighLimit",
|
|
"addr": 3446,
|
|
"write_addr": 3446,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.WSP_B",
|
|
"addr": 3448,
|
|
"write_addr": 3448,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Output_LowLimit",
|
|
"addr": 3450,
|
|
"write_addr": 3450,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Output_HighLimit",
|
|
"addr": 3452,
|
|
"write_addr": 3452,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.OP",
|
|
"addr": 3454,
|
|
"write_addr": 3454,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Ratio",
|
|
"addr": 3462,
|
|
"write_addr": 3462,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Bias",
|
|
"addr": 3464,
|
|
"write_addr": 3464,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.Deviation",
|
|
"addr": 3466,
|
|
"write_addr": 3466,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.ManualReset",
|
|
"addr": 3470,
|
|
"write_addr": 3470,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.FeedforwardGain",
|
|
"addr": 3472,
|
|
"write_addr": 3472,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.LocalPctCO",
|
|
"addr": 3474,
|
|
"write_addr": 3474,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.FurnaceFactor",
|
|
"addr": 3476,
|
|
"write_addr": 3476,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.PercentHydrogen",
|
|
"addr": 3478,
|
|
"write_addr": 3478,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.OnOffHysteresis",
|
|
"addr": 3480,
|
|
"write_addr": 3480,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.CarbPotDewpt",
|
|
"addr": 3482,
|
|
"write_addr": 3482,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.StepMotorTime",
|
|
"addr": 3484,
|
|
"write_addr": 3484,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.FuzzyEnable",
|
|
"addr": 3575,
|
|
"write_addr": 3575,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.DemandTune",
|
|
"addr": 3576,
|
|
"write_addr": 3576,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.AntiSootEnable",
|
|
"addr": 3577,
|
|
"write_addr": 3577,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.AutoManState",
|
|
"addr": 3578,
|
|
"write_addr": 3578,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.SP_SelectState",
|
|
"addr": 3579,
|
|
"write_addr": 3579,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.RemLocSPState",
|
|
"addr": 3580,
|
|
"write_addr": 3580,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.TuneSetState",
|
|
"addr": 3581,
|
|
"write_addr": 3581,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-9211A.MD",
|
|
"addr": 3582,
|
|
"write_addr": 3578,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #14 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-9113.PV",
|
|
"addr": 3648,
|
|
"write_addr": 3648,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-9113.RSP_SP2",
|
|
"addr": 3650,
|
|
"write_addr": 3650,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.SP",
|
|
"addr": 3652,
|
|
"write_addr": 3652,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Output",
|
|
"addr": 3654,
|
|
"write_addr": 3654,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.PV_B",
|
|
"addr": 3656,
|
|
"write_addr": 3656,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.CarbonPotTemp",
|
|
"addr": 3658,
|
|
"write_addr": 3658,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.GAIN",
|
|
"addr": 3660,
|
|
"write_addr": 3660,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Direction",
|
|
"addr": 3662,
|
|
"write_addr": 3662,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.RESET",
|
|
"addr": 3664,
|
|
"write_addr": 3664,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.RATE",
|
|
"addr": 3666,
|
|
"write_addr": 3666,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.CycleTime1",
|
|
"addr": 3668,
|
|
"write_addr": 3668,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.PV_LowRange",
|
|
"addr": 3670,
|
|
"write_addr": 3670,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.PV_HighRange",
|
|
"addr": 3672,
|
|
"write_addr": 3672,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Alarm1SP1",
|
|
"addr": 3674,
|
|
"write_addr": 3674,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.AL1SP1",
|
|
"addr": 3674,
|
|
"write_addr": 3674,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Alarm1SP2",
|
|
"addr": 3676,
|
|
"write_addr": 3676,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Gain2",
|
|
"addr": 3680,
|
|
"write_addr": 3680,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.StepDeadband",
|
|
"addr": 3682,
|
|
"write_addr": 3682,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Reset2",
|
|
"addr": 3684,
|
|
"write_addr": 3684,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Rate2",
|
|
"addr": 3686,
|
|
"write_addr": 3686,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.CycleTime2",
|
|
"addr": 3688,
|
|
"write_addr": 3688,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.LSP1",
|
|
"addr": 3690,
|
|
"write_addr": 3690,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.LSP2",
|
|
"addr": 3692,
|
|
"write_addr": 3692,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Alarm2SP1",
|
|
"addr": 3694,
|
|
"write_addr": 3694,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.AL2SP1",
|
|
"addr": 3694,
|
|
"write_addr": 3694,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Alarm2SP2",
|
|
"addr": 3696,
|
|
"write_addr": 3696,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.SP_LowLimit",
|
|
"addr": 3700,
|
|
"write_addr": 3700,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.SP_HighLimit",
|
|
"addr": 3702,
|
|
"write_addr": 3702,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.WSP_B",
|
|
"addr": 3704,
|
|
"write_addr": 3704,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Output_LowLimit",
|
|
"addr": 3706,
|
|
"write_addr": 3706,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Output_HighLimit",
|
|
"addr": 3708,
|
|
"write_addr": 3708,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.OP",
|
|
"addr": 3710,
|
|
"write_addr": 3710,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Ratio",
|
|
"addr": 3718,
|
|
"write_addr": 3718,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Bias",
|
|
"addr": 3720,
|
|
"write_addr": 3720,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.Deviation",
|
|
"addr": 3722,
|
|
"write_addr": 3722,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.ManualReset",
|
|
"addr": 3726,
|
|
"write_addr": 3726,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.FeedforwardGain",
|
|
"addr": 3728,
|
|
"write_addr": 3728,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.LocalPctCO",
|
|
"addr": 3730,
|
|
"write_addr": 3730,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.FurnaceFactor",
|
|
"addr": 3732,
|
|
"write_addr": 3732,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.PercentHydrogen",
|
|
"addr": 3734,
|
|
"write_addr": 3734,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.OnOffHysteresis",
|
|
"addr": 3736,
|
|
"write_addr": 3736,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.CarbPotDewpt",
|
|
"addr": 3738,
|
|
"write_addr": 3738,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.StepMotorTime",
|
|
"addr": 3740,
|
|
"write_addr": 3740,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.FuzzyEnable",
|
|
"addr": 3831,
|
|
"write_addr": 3831,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.DemandTune",
|
|
"addr": 3832,
|
|
"write_addr": 3832,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.AntiSootEnable",
|
|
"addr": 3833,
|
|
"write_addr": 3833,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.AutoManState",
|
|
"addr": 3834,
|
|
"write_addr": 3834,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.SP_SelectState",
|
|
"addr": 3835,
|
|
"write_addr": 3835,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.RemLocSPState",
|
|
"addr": 3836,
|
|
"write_addr": 3836,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.TuneSetState",
|
|
"addr": 3837,
|
|
"write_addr": 3837,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9113.MD",
|
|
"addr": 3838,
|
|
"write_addr": 3834,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #15 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-9213.PV",
|
|
"addr": 3904,
|
|
"write_addr": 3904,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-9213.RSP_SP2",
|
|
"addr": 3906,
|
|
"write_addr": 3906,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.SP",
|
|
"addr": 3908,
|
|
"write_addr": 3908,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Output",
|
|
"addr": 3910,
|
|
"write_addr": 3910,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.PV_B",
|
|
"addr": 3912,
|
|
"write_addr": 3912,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.CarbonPotTemp",
|
|
"addr": 3914,
|
|
"write_addr": 3914,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.GAIN",
|
|
"addr": 3916,
|
|
"write_addr": 3916,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Direction",
|
|
"addr": 3918,
|
|
"write_addr": 3918,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.RESET",
|
|
"addr": 3920,
|
|
"write_addr": 3920,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.RATE",
|
|
"addr": 3922,
|
|
"write_addr": 3922,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.CycleTime1",
|
|
"addr": 3924,
|
|
"write_addr": 3924,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.PV_LowRange",
|
|
"addr": 3926,
|
|
"write_addr": 3926,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.PV_HighRange",
|
|
"addr": 3928,
|
|
"write_addr": 3928,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Alarm1SP1",
|
|
"addr": 3930,
|
|
"write_addr": 3930,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.AL1SP1",
|
|
"addr": 3930,
|
|
"write_addr": 3930,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Alarm1SP2",
|
|
"addr": 3932,
|
|
"write_addr": 3932,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Gain2",
|
|
"addr": 3936,
|
|
"write_addr": 3936,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.StepDeadband",
|
|
"addr": 3938,
|
|
"write_addr": 3938,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Reset2",
|
|
"addr": 3940,
|
|
"write_addr": 3940,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Rate2",
|
|
"addr": 3942,
|
|
"write_addr": 3942,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.CycleTime2",
|
|
"addr": 3944,
|
|
"write_addr": 3944,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.LSP1",
|
|
"addr": 3946,
|
|
"write_addr": 3946,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.LSP2",
|
|
"addr": 3948,
|
|
"write_addr": 3948,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Alarm2SP1",
|
|
"addr": 3950,
|
|
"write_addr": 3950,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.AL2SP1",
|
|
"addr": 3950,
|
|
"write_addr": 3950,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Alarm2SP2",
|
|
"addr": 3952,
|
|
"write_addr": 3952,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.SP_LowLimit",
|
|
"addr": 3956,
|
|
"write_addr": 3956,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.SP_HighLimit",
|
|
"addr": 3958,
|
|
"write_addr": 3958,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.WSP_B",
|
|
"addr": 3960,
|
|
"write_addr": 3960,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Output_LowLimit",
|
|
"addr": 3962,
|
|
"write_addr": 3962,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Output_HighLimit",
|
|
"addr": 3964,
|
|
"write_addr": 3964,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.OP",
|
|
"addr": 3966,
|
|
"write_addr": 3966,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Ratio",
|
|
"addr": 3974,
|
|
"write_addr": 3974,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Bias",
|
|
"addr": 3976,
|
|
"write_addr": 3976,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.Deviation",
|
|
"addr": 3978,
|
|
"write_addr": 3978,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.ManualReset",
|
|
"addr": 3982,
|
|
"write_addr": 3982,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.FeedforwardGain",
|
|
"addr": 3984,
|
|
"write_addr": 3984,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.LocalPctCO",
|
|
"addr": 3986,
|
|
"write_addr": 3986,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.FurnaceFactor",
|
|
"addr": 3988,
|
|
"write_addr": 3988,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.PercentHydrogen",
|
|
"addr": 3990,
|
|
"write_addr": 3990,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.OnOffHysteresis",
|
|
"addr": 3992,
|
|
"write_addr": 3992,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.CarbPotDewpt",
|
|
"addr": 3994,
|
|
"write_addr": 3994,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.StepMotorTime",
|
|
"addr": 3996,
|
|
"write_addr": 3996,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.FuzzyEnable",
|
|
"addr": 4087,
|
|
"write_addr": 4087,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.DemandTune",
|
|
"addr": 4088,
|
|
"write_addr": 4088,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.AntiSootEnable",
|
|
"addr": 4089,
|
|
"write_addr": 4089,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.AutoManState",
|
|
"addr": 4090,
|
|
"write_addr": 4090,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.SP_SelectState",
|
|
"addr": 4091,
|
|
"write_addr": 4091,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.RemLocSPState",
|
|
"addr": 4092,
|
|
"write_addr": 4092,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.TuneSetState",
|
|
"addr": 4093,
|
|
"write_addr": 4093,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-9213.MD",
|
|
"addr": 4094,
|
|
"write_addr": 4090,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #16 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.PV",
|
|
"addr": 4160,
|
|
"write_addr": 4160,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #17 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.RSP_SP2",
|
|
"addr": 4162,
|
|
"write_addr": 4162,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.SP",
|
|
"addr": 4164,
|
|
"write_addr": 4164,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Output",
|
|
"addr": 4166,
|
|
"write_addr": 4166,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.PV_B",
|
|
"addr": 4168,
|
|
"write_addr": 4168,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #17 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.CarbonPotTemp",
|
|
"addr": 4170,
|
|
"write_addr": 4170,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #17 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.GAIN",
|
|
"addr": 4172,
|
|
"write_addr": 4172,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Direction",
|
|
"addr": 4174,
|
|
"write_addr": 4174,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #17 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.RESET",
|
|
"addr": 4176,
|
|
"write_addr": 4176,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.RATE",
|
|
"addr": 4178,
|
|
"write_addr": 4178,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.CycleTime1",
|
|
"addr": 4180,
|
|
"write_addr": 4180,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #17 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.PV_LowRange",
|
|
"addr": 4182,
|
|
"write_addr": 4182,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #17 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.PV_HighRange",
|
|
"addr": 4184,
|
|
"write_addr": 4184,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #17 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Alarm1SP1",
|
|
"addr": 4186,
|
|
"write_addr": 4186,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Alarm1SP2",
|
|
"addr": 4188,
|
|
"write_addr": 4188,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Gain2",
|
|
"addr": 4192,
|
|
"write_addr": 4192,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.StepDeadband",
|
|
"addr": 4194,
|
|
"write_addr": 4194,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Reset2",
|
|
"addr": 4196,
|
|
"write_addr": 4196,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Rate2",
|
|
"addr": 4198,
|
|
"write_addr": 4198,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.CycleTime2",
|
|
"addr": 4200,
|
|
"write_addr": 4200,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #17 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.LSP1",
|
|
"addr": 4202,
|
|
"write_addr": 4202,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.LSP2",
|
|
"addr": 4204,
|
|
"write_addr": 4204,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Alarm2SP1",
|
|
"addr": 4206,
|
|
"write_addr": 4206,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Alarm2SP2",
|
|
"addr": 4208,
|
|
"write_addr": 4208,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.SP_LowLimit",
|
|
"addr": 4212,
|
|
"write_addr": 4212,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.SP_HighLimit",
|
|
"addr": 4214,
|
|
"write_addr": 4214,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.WSP_B",
|
|
"addr": 4216,
|
|
"write_addr": 4216,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Output_LowLimit",
|
|
"addr": 4218,
|
|
"write_addr": 4218,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Output_HighLimit",
|
|
"addr": 4220,
|
|
"write_addr": 4220,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.OP",
|
|
"addr": 4222,
|
|
"write_addr": 4222,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Ratio",
|
|
"addr": 4230,
|
|
"write_addr": 4230,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Bias",
|
|
"addr": 4232,
|
|
"write_addr": 4232,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.Deviation",
|
|
"addr": 4234,
|
|
"write_addr": 4234,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #17 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.ManualReset",
|
|
"addr": 4238,
|
|
"write_addr": 4238,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.FeedforwardGain",
|
|
"addr": 4240,
|
|
"write_addr": 4240,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.LocalPctCO",
|
|
"addr": 4242,
|
|
"write_addr": 4242,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.FurnaceFactor",
|
|
"addr": 4244,
|
|
"write_addr": 4244,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.PercentHydrogen",
|
|
"addr": 4246,
|
|
"write_addr": 4246,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.OnOffHysteresis",
|
|
"addr": 4248,
|
|
"write_addr": 4248,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.CarbPotDewpt",
|
|
"addr": 4250,
|
|
"write_addr": 4250,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.StepMotorTime",
|
|
"addr": 4252,
|
|
"write_addr": 4252,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #17 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.FuzzyEnable",
|
|
"addr": 4343,
|
|
"write_addr": 4343,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #17 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.DemandTune",
|
|
"addr": 4344,
|
|
"write_addr": 4344,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #17 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.AntiSootEnable",
|
|
"addr": 4345,
|
|
"write_addr": 4345,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #17 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.AutoManState",
|
|
"addr": 4346,
|
|
"write_addr": 4346,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #17 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.SP_SelectState",
|
|
"addr": 4347,
|
|
"write_addr": 4347,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #17 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.RemLocSPState",
|
|
"addr": 4348,
|
|
"write_addr": 4348,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #17 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.TuneSetState",
|
|
"addr": 4349,
|
|
"write_addr": 4349,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #17 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.MD",
|
|
"addr": 4350,
|
|
"write_addr": 4346,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #17 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.PV",
|
|
"addr": 4416,
|
|
"write_addr": 4416,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #18 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.RSP_SP2",
|
|
"addr": 4418,
|
|
"write_addr": 4418,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.SP",
|
|
"addr": 4420,
|
|
"write_addr": 4420,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Output",
|
|
"addr": 4422,
|
|
"write_addr": 4422,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.PV_B",
|
|
"addr": 4424,
|
|
"write_addr": 4424,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #18 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.CarbonPotTemp",
|
|
"addr": 4426,
|
|
"write_addr": 4426,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #18 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.GAIN",
|
|
"addr": 4428,
|
|
"write_addr": 4428,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Direction",
|
|
"addr": 4430,
|
|
"write_addr": 4430,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #18 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.RESET",
|
|
"addr": 4432,
|
|
"write_addr": 4432,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.RATE",
|
|
"addr": 4434,
|
|
"write_addr": 4434,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.CycleTime1",
|
|
"addr": 4436,
|
|
"write_addr": 4436,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #18 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.PV_LowRange",
|
|
"addr": 4438,
|
|
"write_addr": 4438,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #18 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.PV_HighRange",
|
|
"addr": 4440,
|
|
"write_addr": 4440,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #18 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Alarm1SP1",
|
|
"addr": 4442,
|
|
"write_addr": 4442,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Alarm1SP2",
|
|
"addr": 4444,
|
|
"write_addr": 4444,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Gain2",
|
|
"addr": 4448,
|
|
"write_addr": 4448,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.StepDeadband",
|
|
"addr": 4450,
|
|
"write_addr": 4450,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Reset2",
|
|
"addr": 4452,
|
|
"write_addr": 4452,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Rate2",
|
|
"addr": 4454,
|
|
"write_addr": 4454,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.CycleTime2",
|
|
"addr": 4456,
|
|
"write_addr": 4456,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #18 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.LSP1",
|
|
"addr": 4458,
|
|
"write_addr": 4458,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.LSP2",
|
|
"addr": 4460,
|
|
"write_addr": 4460,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Alarm2SP1",
|
|
"addr": 4462,
|
|
"write_addr": 4462,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Alarm2SP2",
|
|
"addr": 4464,
|
|
"write_addr": 4464,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.SP_LowLimit",
|
|
"addr": 4468,
|
|
"write_addr": 4468,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.SP_HighLimit",
|
|
"addr": 4470,
|
|
"write_addr": 4470,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.WSP_B",
|
|
"addr": 4472,
|
|
"write_addr": 4472,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Output_LowLimit",
|
|
"addr": 4474,
|
|
"write_addr": 4474,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Output_HighLimit",
|
|
"addr": 4476,
|
|
"write_addr": 4476,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.OP",
|
|
"addr": 4478,
|
|
"write_addr": 4478,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Ratio",
|
|
"addr": 4486,
|
|
"write_addr": 4486,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Bias",
|
|
"addr": 4488,
|
|
"write_addr": 4488,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.Deviation",
|
|
"addr": 4490,
|
|
"write_addr": 4490,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #18 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.ManualReset",
|
|
"addr": 4494,
|
|
"write_addr": 4494,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.FeedforwardGain",
|
|
"addr": 4496,
|
|
"write_addr": 4496,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.LocalPctCO",
|
|
"addr": 4498,
|
|
"write_addr": 4498,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.FurnaceFactor",
|
|
"addr": 4500,
|
|
"write_addr": 4500,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.PercentHydrogen",
|
|
"addr": 4502,
|
|
"write_addr": 4502,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.OnOffHysteresis",
|
|
"addr": 4504,
|
|
"write_addr": 4504,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.CarbPotDewpt",
|
|
"addr": 4506,
|
|
"write_addr": 4506,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.StepMotorTime",
|
|
"addr": 4508,
|
|
"write_addr": 4508,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #18 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.FuzzyEnable",
|
|
"addr": 4599,
|
|
"write_addr": 4599,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #18 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.DemandTune",
|
|
"addr": 4600,
|
|
"write_addr": 4600,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #18 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.AntiSootEnable",
|
|
"addr": 4601,
|
|
"write_addr": 4601,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #18 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.AutoManState",
|
|
"addr": 4602,
|
|
"write_addr": 4602,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #18 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.SP_SelectState",
|
|
"addr": 4603,
|
|
"write_addr": 4603,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #18 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.RemLocSPState",
|
|
"addr": 4604,
|
|
"write_addr": 4604,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #18 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.TuneSetState",
|
|
"addr": 4605,
|
|
"write_addr": 4605,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #18 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.MD",
|
|
"addr": 4606,
|
|
"write_addr": 4602,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #18 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.PV",
|
|
"addr": 4672,
|
|
"write_addr": 4672,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #19 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.RSP_SP2",
|
|
"addr": 4674,
|
|
"write_addr": 4674,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.SP",
|
|
"addr": 4676,
|
|
"write_addr": 4676,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Output",
|
|
"addr": 4678,
|
|
"write_addr": 4678,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.PV_B",
|
|
"addr": 4680,
|
|
"write_addr": 4680,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #19 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.CarbonPotTemp",
|
|
"addr": 4682,
|
|
"write_addr": 4682,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #19 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.GAIN",
|
|
"addr": 4684,
|
|
"write_addr": 4684,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Direction",
|
|
"addr": 4686,
|
|
"write_addr": 4686,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #19 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.RESET",
|
|
"addr": 4688,
|
|
"write_addr": 4688,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.RATE",
|
|
"addr": 4690,
|
|
"write_addr": 4690,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.CycleTime1",
|
|
"addr": 4692,
|
|
"write_addr": 4692,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #19 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.PV_LowRange",
|
|
"addr": 4694,
|
|
"write_addr": 4694,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #19 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.PV_HighRange",
|
|
"addr": 4696,
|
|
"write_addr": 4696,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #19 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Alarm1SP1",
|
|
"addr": 4698,
|
|
"write_addr": 4698,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.AL1SP1",
|
|
"addr": 4698,
|
|
"write_addr": 4698,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Alarm1SP2",
|
|
"addr": 4700,
|
|
"write_addr": 4700,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Gain2",
|
|
"addr": 4704,
|
|
"write_addr": 4704,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.StepDeadband",
|
|
"addr": 4706,
|
|
"write_addr": 4706,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Reset2",
|
|
"addr": 4708,
|
|
"write_addr": 4708,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Rate2",
|
|
"addr": 4710,
|
|
"write_addr": 4710,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.CycleTime2",
|
|
"addr": 4712,
|
|
"write_addr": 4712,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #19 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.LSP1",
|
|
"addr": 4714,
|
|
"write_addr": 4714,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.LSP2",
|
|
"addr": 4716,
|
|
"write_addr": 4716,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Alarm2SP1",
|
|
"addr": 4718,
|
|
"write_addr": 4718,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.AL2SP1",
|
|
"addr": 4718,
|
|
"write_addr": 4718,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Alarm2SP2",
|
|
"addr": 4720,
|
|
"write_addr": 4720,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.SP_LowLimit",
|
|
"addr": 4724,
|
|
"write_addr": 4724,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.SP_HighLimit",
|
|
"addr": 4726,
|
|
"write_addr": 4726,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.WSP_B",
|
|
"addr": 4728,
|
|
"write_addr": 4728,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Output_LowLimit",
|
|
"addr": 4730,
|
|
"write_addr": 4730,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Output_HighLimit",
|
|
"addr": 4732,
|
|
"write_addr": 4732,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.OP",
|
|
"addr": 4734,
|
|
"write_addr": 4734,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Ratio",
|
|
"addr": 4742,
|
|
"write_addr": 4742,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Bias",
|
|
"addr": 4744,
|
|
"write_addr": 4744,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.Deviation",
|
|
"addr": 4746,
|
|
"write_addr": 4746,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #19 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.ManualReset",
|
|
"addr": 4750,
|
|
"write_addr": 4750,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.FeedforwardGain",
|
|
"addr": 4752,
|
|
"write_addr": 4752,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.LocalPctCO",
|
|
"addr": 4754,
|
|
"write_addr": 4754,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.FurnaceFactor",
|
|
"addr": 4756,
|
|
"write_addr": 4756,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.PercentHydrogen",
|
|
"addr": 4758,
|
|
"write_addr": 4758,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.OnOffHysteresis",
|
|
"addr": 4760,
|
|
"write_addr": 4760,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.CarbPotDewpt",
|
|
"addr": 4762,
|
|
"write_addr": 4762,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.StepMotorTime",
|
|
"addr": 4764,
|
|
"write_addr": 4764,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #19 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.FuzzyEnable",
|
|
"addr": 4855,
|
|
"write_addr": 4855,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #19 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.DemandTune",
|
|
"addr": 4856,
|
|
"write_addr": 4856,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #19 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.AntiSootEnable",
|
|
"addr": 4857,
|
|
"write_addr": 4857,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #19 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.AutoManState",
|
|
"addr": 4858,
|
|
"write_addr": 4858,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #19 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.SP_SelectState",
|
|
"addr": 4859,
|
|
"write_addr": 4859,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #19 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.RemLocSPState",
|
|
"addr": 4860,
|
|
"write_addr": 4860,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #19 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.TuneSetState",
|
|
"addr": 4861,
|
|
"write_addr": 4861,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #19 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.MD",
|
|
"addr": 4862,
|
|
"write_addr": 4858,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #19 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.PV",
|
|
"addr": 4928,
|
|
"write_addr": 4928,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #20 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.RSP_SP2",
|
|
"addr": 4930,
|
|
"write_addr": 4930,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.SP",
|
|
"addr": 4932,
|
|
"write_addr": 4932,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Output",
|
|
"addr": 4934,
|
|
"write_addr": 4934,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.PV_B",
|
|
"addr": 4936,
|
|
"write_addr": 4936,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #20 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.CarbonPotTemp",
|
|
"addr": 4938,
|
|
"write_addr": 4938,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #20 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.GAIN",
|
|
"addr": 4940,
|
|
"write_addr": 4940,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Direction",
|
|
"addr": 4942,
|
|
"write_addr": 4942,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #20 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.RESET",
|
|
"addr": 4944,
|
|
"write_addr": 4944,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.RATE",
|
|
"addr": 4946,
|
|
"write_addr": 4946,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.CycleTime1",
|
|
"addr": 4948,
|
|
"write_addr": 4948,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #20 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.PV_LowRange",
|
|
"addr": 4950,
|
|
"write_addr": 4950,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #20 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.PV_HighRange",
|
|
"addr": 4952,
|
|
"write_addr": 4952,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #20 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Alarm1SP1",
|
|
"addr": 4954,
|
|
"write_addr": 4954,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.AL1SP1",
|
|
"addr": 4954,
|
|
"write_addr": 4954,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Alarm1SP2",
|
|
"addr": 4956,
|
|
"write_addr": 4956,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Gain2",
|
|
"addr": 4960,
|
|
"write_addr": 4960,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.StepDeadband",
|
|
"addr": 4962,
|
|
"write_addr": 4962,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Reset2",
|
|
"addr": 4964,
|
|
"write_addr": 4964,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Rate2",
|
|
"addr": 4966,
|
|
"write_addr": 4966,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.CycleTime2",
|
|
"addr": 4968,
|
|
"write_addr": 4968,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #20 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.LSP1",
|
|
"addr": 4970,
|
|
"write_addr": 4970,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.LSP2",
|
|
"addr": 4972,
|
|
"write_addr": 4972,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Alarm2SP1",
|
|
"addr": 4974,
|
|
"write_addr": 4974,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.AL2SP1",
|
|
"addr": 4974,
|
|
"write_addr": 4974,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Alarm2SP2",
|
|
"addr": 4976,
|
|
"write_addr": 4976,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.SP_LowLimit",
|
|
"addr": 4980,
|
|
"write_addr": 4980,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.SP_HighLimit",
|
|
"addr": 4982,
|
|
"write_addr": 4982,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.WSP_B",
|
|
"addr": 4984,
|
|
"write_addr": 4984,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Output_LowLimit",
|
|
"addr": 4986,
|
|
"write_addr": 4986,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Output_HighLimit",
|
|
"addr": 4988,
|
|
"write_addr": 4988,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.OP",
|
|
"addr": 4990,
|
|
"write_addr": 4990,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Ratio",
|
|
"addr": 4998,
|
|
"write_addr": 4998,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Bias",
|
|
"addr": 5000,
|
|
"write_addr": 5000,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.Deviation",
|
|
"addr": 5002,
|
|
"write_addr": 5002,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #20 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.ManualReset",
|
|
"addr": 5006,
|
|
"write_addr": 5006,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.FeedforwardGain",
|
|
"addr": 5008,
|
|
"write_addr": 5008,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.LocalPctCO",
|
|
"addr": 5010,
|
|
"write_addr": 5010,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.FurnaceFactor",
|
|
"addr": 5012,
|
|
"write_addr": 5012,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.PercentHydrogen",
|
|
"addr": 5014,
|
|
"write_addr": 5014,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.OnOffHysteresis",
|
|
"addr": 5016,
|
|
"write_addr": 5016,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.CarbPotDewpt",
|
|
"addr": 5018,
|
|
"write_addr": 5018,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.StepMotorTime",
|
|
"addr": 5020,
|
|
"write_addr": 5020,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #20 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.FuzzyEnable",
|
|
"addr": 5111,
|
|
"write_addr": 5111,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #20 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.DemandTune",
|
|
"addr": 5112,
|
|
"write_addr": 5112,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #20 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.AntiSootEnable",
|
|
"addr": 5113,
|
|
"write_addr": 5113,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #20 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.AutoManState",
|
|
"addr": 5114,
|
|
"write_addr": 5114,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #20 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.SP_SelectState",
|
|
"addr": 5115,
|
|
"write_addr": 5115,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #20 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.RemLocSPState",
|
|
"addr": 5116,
|
|
"write_addr": 5116,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #20 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.TuneSetState",
|
|
"addr": 5117,
|
|
"write_addr": 5117,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #20 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.MD",
|
|
"addr": 5118,
|
|
"write_addr": 5114,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #20 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-10113.PV",
|
|
"addr": 5184,
|
|
"write_addr": 5184,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #21 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-10113.RSP_SP2",
|
|
"addr": 5186,
|
|
"write_addr": 5186,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.SP",
|
|
"addr": 5188,
|
|
"write_addr": 5188,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Output",
|
|
"addr": 5190,
|
|
"write_addr": 5190,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.PV_B",
|
|
"addr": 5192,
|
|
"write_addr": 5192,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #21 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.CarbonPotTemp",
|
|
"addr": 5194,
|
|
"write_addr": 5194,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #21 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.GAIN",
|
|
"addr": 5196,
|
|
"write_addr": 5196,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Direction",
|
|
"addr": 5198,
|
|
"write_addr": 5198,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #21 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.RESET",
|
|
"addr": 5200,
|
|
"write_addr": 5200,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.RATE",
|
|
"addr": 5202,
|
|
"write_addr": 5202,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.CycleTime1",
|
|
"addr": 5204,
|
|
"write_addr": 5204,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #21 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.PV_LowRange",
|
|
"addr": 5206,
|
|
"write_addr": 5206,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #21 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.PV_HighRange",
|
|
"addr": 5208,
|
|
"write_addr": 5208,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #21 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Alarm1SP1",
|
|
"addr": 5210,
|
|
"write_addr": 5210,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.AL1SP1",
|
|
"addr": 5210,
|
|
"write_addr": 5210,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Alarm1SP2",
|
|
"addr": 5212,
|
|
"write_addr": 5212,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Gain2",
|
|
"addr": 5216,
|
|
"write_addr": 5216,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.StepDeadband",
|
|
"addr": 5218,
|
|
"write_addr": 5218,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Reset2",
|
|
"addr": 5220,
|
|
"write_addr": 5220,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Rate2",
|
|
"addr": 5222,
|
|
"write_addr": 5222,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.CycleTime2",
|
|
"addr": 5224,
|
|
"write_addr": 5224,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #21 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.LSP1",
|
|
"addr": 5226,
|
|
"write_addr": 5226,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.LSP2",
|
|
"addr": 5228,
|
|
"write_addr": 5228,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Alarm2SP1",
|
|
"addr": 5230,
|
|
"write_addr": 5230,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.AL2SP1",
|
|
"addr": 5230,
|
|
"write_addr": 5230,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Alarm2SP2",
|
|
"addr": 5232,
|
|
"write_addr": 5232,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.SP_LowLimit",
|
|
"addr": 5236,
|
|
"write_addr": 5236,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.SP_HighLimit",
|
|
"addr": 5238,
|
|
"write_addr": 5238,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.WSP_B",
|
|
"addr": 5240,
|
|
"write_addr": 5240,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Output_LowLimit",
|
|
"addr": 5242,
|
|
"write_addr": 5242,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Output_HighLimit",
|
|
"addr": 5244,
|
|
"write_addr": 5244,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.OP",
|
|
"addr": 5246,
|
|
"write_addr": 5246,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Ratio",
|
|
"addr": 5254,
|
|
"write_addr": 5254,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Bias",
|
|
"addr": 5256,
|
|
"write_addr": 5256,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.Deviation",
|
|
"addr": 5258,
|
|
"write_addr": 5258,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #21 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.ManualReset",
|
|
"addr": 5262,
|
|
"write_addr": 5262,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.FeedforwardGain",
|
|
"addr": 5264,
|
|
"write_addr": 5264,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.LocalPctCO",
|
|
"addr": 5266,
|
|
"write_addr": 5266,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.FurnaceFactor",
|
|
"addr": 5268,
|
|
"write_addr": 5268,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.PercentHydrogen",
|
|
"addr": 5270,
|
|
"write_addr": 5270,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.OnOffHysteresis",
|
|
"addr": 5272,
|
|
"write_addr": 5272,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.CarbPotDewpt",
|
|
"addr": 5274,
|
|
"write_addr": 5274,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.StepMotorTime",
|
|
"addr": 5276,
|
|
"write_addr": 5276,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #21 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.FuzzyEnable",
|
|
"addr": 5367,
|
|
"write_addr": 5367,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #21 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.DemandTune",
|
|
"addr": 5368,
|
|
"write_addr": 5368,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #21 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.AntiSootEnable",
|
|
"addr": 5369,
|
|
"write_addr": 5369,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #21 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.AutoManState",
|
|
"addr": 5370,
|
|
"write_addr": 5370,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #21 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.SP_SelectState",
|
|
"addr": 5371,
|
|
"write_addr": 5371,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #21 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.RemLocSPState",
|
|
"addr": 5372,
|
|
"write_addr": 5372,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #21 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.TuneSetState",
|
|
"addr": 5373,
|
|
"write_addr": 5373,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #21 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113.MD",
|
|
"addr": 5374,
|
|
"write_addr": 5370,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #21 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.PV",
|
|
"addr": 5440,
|
|
"write_addr": 5440,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #22 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.RSP_SP2",
|
|
"addr": 5442,
|
|
"write_addr": 5442,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.SP",
|
|
"addr": 5444,
|
|
"write_addr": 5444,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Output",
|
|
"addr": 5446,
|
|
"write_addr": 5446,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.PV_B",
|
|
"addr": 5448,
|
|
"write_addr": 5448,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #22 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.CarbonPotTemp",
|
|
"addr": 5450,
|
|
"write_addr": 5450,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #22 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.GAIN",
|
|
"addr": 5452,
|
|
"write_addr": 5452,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Direction",
|
|
"addr": 5454,
|
|
"write_addr": 5454,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #22 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.RESET",
|
|
"addr": 5456,
|
|
"write_addr": 5456,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.RATE",
|
|
"addr": 5458,
|
|
"write_addr": 5458,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.CycleTime1",
|
|
"addr": 5460,
|
|
"write_addr": 5460,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #22 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.PV_LowRange",
|
|
"addr": 5462,
|
|
"write_addr": 5462,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #22 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.PV_HighRange",
|
|
"addr": 5464,
|
|
"write_addr": 5464,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #22 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Alarm1SP1",
|
|
"addr": 5466,
|
|
"write_addr": 5466,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.AL1SP1",
|
|
"addr": 5466,
|
|
"write_addr": 5466,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Alarm1SP2",
|
|
"addr": 5468,
|
|
"write_addr": 5468,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Gain2",
|
|
"addr": 5472,
|
|
"write_addr": 5472,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.StepDeadband",
|
|
"addr": 5474,
|
|
"write_addr": 5474,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Reset2",
|
|
"addr": 5476,
|
|
"write_addr": 5476,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Rate2",
|
|
"addr": 5478,
|
|
"write_addr": 5478,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.CycleTime2",
|
|
"addr": 5480,
|
|
"write_addr": 5480,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #22 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.LSP1",
|
|
"addr": 5482,
|
|
"write_addr": 5482,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.LSP2",
|
|
"addr": 5484,
|
|
"write_addr": 5484,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Alarm2SP1",
|
|
"addr": 5486,
|
|
"write_addr": 5486,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.AL2SP1",
|
|
"addr": 5486,
|
|
"write_addr": 5486,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Alarm2SP2",
|
|
"addr": 5488,
|
|
"write_addr": 5488,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.SP_LowLimit",
|
|
"addr": 5492,
|
|
"write_addr": 5492,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.SP_HighLimit",
|
|
"addr": 5494,
|
|
"write_addr": 5494,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.WSP_B",
|
|
"addr": 5496,
|
|
"write_addr": 5496,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Output_LowLimit",
|
|
"addr": 5498,
|
|
"write_addr": 5498,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Output_HighLimit",
|
|
"addr": 5500,
|
|
"write_addr": 5500,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.OP",
|
|
"addr": 5502,
|
|
"write_addr": 5502,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Ratio",
|
|
"addr": 5510,
|
|
"write_addr": 5510,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Bias",
|
|
"addr": 5512,
|
|
"write_addr": 5512,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.Deviation",
|
|
"addr": 5514,
|
|
"write_addr": 5514,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #22 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.ManualReset",
|
|
"addr": 5518,
|
|
"write_addr": 5518,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.FeedforwardGain",
|
|
"addr": 5520,
|
|
"write_addr": 5520,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.LocalPctCO",
|
|
"addr": 5522,
|
|
"write_addr": 5522,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.FurnaceFactor",
|
|
"addr": 5524,
|
|
"write_addr": 5524,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.PercentHydrogen",
|
|
"addr": 5526,
|
|
"write_addr": 5526,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.OnOffHysteresis",
|
|
"addr": 5528,
|
|
"write_addr": 5528,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.CarbPotDewpt",
|
|
"addr": 5530,
|
|
"write_addr": 5530,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.StepMotorTime",
|
|
"addr": 5532,
|
|
"write_addr": 5532,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #22 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.FuzzyEnable",
|
|
"addr": 5623,
|
|
"write_addr": 5623,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #22 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.DemandTune",
|
|
"addr": 5624,
|
|
"write_addr": 5624,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #22 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.AntiSootEnable",
|
|
"addr": 5625,
|
|
"write_addr": 5625,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #22 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.AutoManState",
|
|
"addr": 5626,
|
|
"write_addr": 5626,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #22 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.SP_SelectState",
|
|
"addr": 5627,
|
|
"write_addr": 5627,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #22 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.RemLocSPState",
|
|
"addr": 5628,
|
|
"write_addr": 5628,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #22 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.TuneSetState",
|
|
"addr": 5629,
|
|
"write_addr": 5629,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #22 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.MD",
|
|
"addr": 5630,
|
|
"write_addr": 5626,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #22 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.PV",
|
|
"addr": 5696,
|
|
"write_addr": 5696,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #23 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.RSP_SP2",
|
|
"addr": 5698,
|
|
"write_addr": 5698,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.SP",
|
|
"addr": 5700,
|
|
"write_addr": 5700,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Output",
|
|
"addr": 5702,
|
|
"write_addr": 5702,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.PV_B",
|
|
"addr": 5704,
|
|
"write_addr": 5704,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #23 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.CarbonPotTemp",
|
|
"addr": 5706,
|
|
"write_addr": 5706,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #23 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.GAIN",
|
|
"addr": 5708,
|
|
"write_addr": 5708,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Direction",
|
|
"addr": 5710,
|
|
"write_addr": 5710,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #23 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.RESET",
|
|
"addr": 5712,
|
|
"write_addr": 5712,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.RATE",
|
|
"addr": 5714,
|
|
"write_addr": 5714,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.CycleTime1",
|
|
"addr": 5716,
|
|
"write_addr": 5716,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #23 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.PV_LowRange",
|
|
"addr": 5718,
|
|
"write_addr": 5718,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #23 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.PV_HighRange",
|
|
"addr": 5720,
|
|
"write_addr": 5720,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #23 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Alarm1SP1",
|
|
"addr": 5722,
|
|
"write_addr": 5722,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.AL1SP1",
|
|
"addr": 5722,
|
|
"write_addr": 5722,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Alarm1SP2",
|
|
"addr": 5724,
|
|
"write_addr": 5724,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Gain2",
|
|
"addr": 5728,
|
|
"write_addr": 5728,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.StepDeadband",
|
|
"addr": 5730,
|
|
"write_addr": 5730,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Reset2",
|
|
"addr": 5732,
|
|
"write_addr": 5732,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Rate2",
|
|
"addr": 5734,
|
|
"write_addr": 5734,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.CycleTime2",
|
|
"addr": 5736,
|
|
"write_addr": 5736,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #23 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.LSP1",
|
|
"addr": 5738,
|
|
"write_addr": 5738,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.LSP2",
|
|
"addr": 5740,
|
|
"write_addr": 5740,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Alarm2SP1",
|
|
"addr": 5742,
|
|
"write_addr": 5742,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.AL2SP1",
|
|
"addr": 5742,
|
|
"write_addr": 5742,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Alarm2SP2",
|
|
"addr": 5744,
|
|
"write_addr": 5744,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.SP_LowLimit",
|
|
"addr": 5748,
|
|
"write_addr": 5748,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.SP_HighLimit",
|
|
"addr": 5750,
|
|
"write_addr": 5750,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.WSP_B",
|
|
"addr": 5752,
|
|
"write_addr": 5752,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Output_LowLimit",
|
|
"addr": 5754,
|
|
"write_addr": 5754,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Output_HighLimit",
|
|
"addr": 5756,
|
|
"write_addr": 5756,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.OP",
|
|
"addr": 5758,
|
|
"write_addr": 5758,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Ratio",
|
|
"addr": 5766,
|
|
"write_addr": 5766,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Bias",
|
|
"addr": 5768,
|
|
"write_addr": 5768,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.Deviation",
|
|
"addr": 5770,
|
|
"write_addr": 5770,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #23 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.ManualReset",
|
|
"addr": 5774,
|
|
"write_addr": 5774,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.FeedforwardGain",
|
|
"addr": 5776,
|
|
"write_addr": 5776,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.LocalPctCO",
|
|
"addr": 5778,
|
|
"write_addr": 5778,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.FurnaceFactor",
|
|
"addr": 5780,
|
|
"write_addr": 5780,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.PercentHydrogen",
|
|
"addr": 5782,
|
|
"write_addr": 5782,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.OnOffHysteresis",
|
|
"addr": 5784,
|
|
"write_addr": 5784,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.CarbPotDewpt",
|
|
"addr": 5786,
|
|
"write_addr": 5786,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.StepMotorTime",
|
|
"addr": 5788,
|
|
"write_addr": 5788,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #23 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.FuzzyEnable",
|
|
"addr": 5879,
|
|
"write_addr": 5879,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #23 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.DemandTune",
|
|
"addr": 5880,
|
|
"write_addr": 5880,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #23 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.AntiSootEnable",
|
|
"addr": 5881,
|
|
"write_addr": 5881,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #23 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.AutoManState",
|
|
"addr": 5882,
|
|
"write_addr": 5882,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #23 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.SP_SelectState",
|
|
"addr": 5883,
|
|
"write_addr": 5883,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #23 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.RemLocSPState",
|
|
"addr": 5884,
|
|
"write_addr": 5884,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #23 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.TuneSetState",
|
|
"addr": 5885,
|
|
"write_addr": 5885,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #23 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A.MD",
|
|
"addr": 5886,
|
|
"write_addr": 5882,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #23 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.PV",
|
|
"addr": 5952,
|
|
"write_addr": 5952,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #24 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.RSP_SP2",
|
|
"addr": 5954,
|
|
"write_addr": 5954,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.SP",
|
|
"addr": 5956,
|
|
"write_addr": 5956,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Output",
|
|
"addr": 5958,
|
|
"write_addr": 5958,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.PV_B",
|
|
"addr": 5960,
|
|
"write_addr": 5960,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #24 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.CarbonPotTemp",
|
|
"addr": 5962,
|
|
"write_addr": 5962,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #24 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.GAIN",
|
|
"addr": 5964,
|
|
"write_addr": 5964,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Direction",
|
|
"addr": 5966,
|
|
"write_addr": 5966,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #24 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.RESET",
|
|
"addr": 5968,
|
|
"write_addr": 5968,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.RATE",
|
|
"addr": 5970,
|
|
"write_addr": 5970,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.CycleTime1",
|
|
"addr": 5972,
|
|
"write_addr": 5972,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #24 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.PV_LowRange",
|
|
"addr": 5974,
|
|
"write_addr": 5974,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #24 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.PV_HighRange",
|
|
"addr": 5976,
|
|
"write_addr": 5976,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #24 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Alarm1SP1",
|
|
"addr": 5978,
|
|
"write_addr": 5978,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.AL1SP1",
|
|
"addr": 5978,
|
|
"write_addr": 5978,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Alarm1SP2",
|
|
"addr": 5980,
|
|
"write_addr": 5980,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Gain2",
|
|
"addr": 5984,
|
|
"write_addr": 5984,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.StepDeadband",
|
|
"addr": 5986,
|
|
"write_addr": 5986,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Reset2",
|
|
"addr": 5988,
|
|
"write_addr": 5988,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Rate2",
|
|
"addr": 5990,
|
|
"write_addr": 5990,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.CycleTime2",
|
|
"addr": 5992,
|
|
"write_addr": 5992,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #24 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.LSP1",
|
|
"addr": 5994,
|
|
"write_addr": 5994,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.LSP2",
|
|
"addr": 5996,
|
|
"write_addr": 5996,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Alarm2SP1",
|
|
"addr": 5998,
|
|
"write_addr": 5998,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.AL2SP1",
|
|
"addr": 5998,
|
|
"write_addr": 5998,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Alarm2SP2",
|
|
"addr": 6000,
|
|
"write_addr": 6000,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.SP_LowLimit",
|
|
"addr": 6004,
|
|
"write_addr": 6004,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.SP_HighLimit",
|
|
"addr": 6006,
|
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"write_addr": 6006,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.WSP_B",
|
|
"addr": 6008,
|
|
"write_addr": 6008,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Output_LowLimit",
|
|
"addr": 6010,
|
|
"write_addr": 6010,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Output_HighLimit",
|
|
"addr": 6012,
|
|
"write_addr": 6012,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.OP",
|
|
"addr": 6014,
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|
"write_addr": 6014,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Ratio",
|
|
"addr": 6022,
|
|
"write_addr": 6022,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.Bias",
|
|
"addr": 6024,
|
|
"write_addr": 6024,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 Bias",
|
|
"archive": false
|
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},
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{
|
|
"tag": "PICA-10111A.Deviation",
|
|
"addr": 6026,
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|
"write_addr": 6026,
|
|
"count": 2,
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|
"type": "float32",
|
|
"access": "R",
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"description": "LOOP #24 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.ManualReset",
|
|
"addr": 6030,
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|
"write_addr": 6030,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.FeedforwardGain",
|
|
"addr": 6032,
|
|
"write_addr": 6032,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.LocalPctCO",
|
|
"addr": 6034,
|
|
"write_addr": 6034,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.FurnaceFactor",
|
|
"addr": 6036,
|
|
"write_addr": 6036,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.PercentHydrogen",
|
|
"addr": 6038,
|
|
"write_addr": 6038,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.OnOffHysteresis",
|
|
"addr": 6040,
|
|
"write_addr": 6040,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.CarbPotDewpt",
|
|
"addr": 6042,
|
|
"write_addr": 6042,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.StepMotorTime",
|
|
"addr": 6044,
|
|
"write_addr": 6044,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #24 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.FuzzyEnable",
|
|
"addr": 6135,
|
|
"write_addr": 6135,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #24 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.DemandTune",
|
|
"addr": 6136,
|
|
"write_addr": 6136,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #24 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.AntiSootEnable",
|
|
"addr": 6137,
|
|
"write_addr": 6137,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #24 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.AutoManState",
|
|
"addr": 6138,
|
|
"write_addr": 6138,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #24 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.SP_SelectState",
|
|
"addr": 6139,
|
|
"write_addr": 6139,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #24 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.RemLocSPState",
|
|
"addr": 6140,
|
|
"write_addr": 6140,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #24 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A.TuneSetState",
|
|
"addr": 6141,
|
|
"write_addr": 6141,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
|
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{
|
|
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|
|
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|
|
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|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
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|
|
"archive": true
|
|
},
|
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{
|
|
"tag": "XV-9101.MD",
|
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|
|
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|
|
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|
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|
|
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|
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"archive": false
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},
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{
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|
"tag": "XV-DFU1.MD",
|
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|
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|
|
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|
"access": "RW",
|
|
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|
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"archive": false
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},
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{
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|
"tag": "XV-DFU2.MD",
|
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|
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|
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"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint MD",
|
|
"archive": false
|
|
},
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|
{
|
|
"tag": "XV-DFU3.MD",
|
|
"addr": 6336,
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|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
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|
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"archive": false
|
|
},
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{
|
|
"tag": "XV-DFU4.MD",
|
|
"addr": 6336,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
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"archive": false
|
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},
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{
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|
"tag": "XV-DFU5A.MD",
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|
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|
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|
|
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|
|
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"archive": false
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{
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|
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|
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|
|
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"archive": false
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{
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|
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|
"type": "float32",
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|
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|
|
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|
"archive": false
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|
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{
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|
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|
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|
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|
|
"type": "float32",
|
|
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|
|
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"archive": false
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|
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{
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|
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|
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|
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|
|
"type": "float32",
|
|
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|
|
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{
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|
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"addr": 6336,
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|
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|
|
"type": "float32",
|
|
"access": "RW",
|
|
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|
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|
|
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{
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|
|
"addr": 6336,
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|
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|
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|
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"archive": false
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{
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|
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|
"addr": 6338,
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|
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|
|
"count": 2,
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|
"type": "float32",
|
|
"access": "RW",
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|
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|
"archive": false
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|
},
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|
{
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|
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|
|
"addr": 6340,
|
|
"write_addr": 6340,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter HZSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "F-10601.HZSET",
|
|
"addr": 6340,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter HZSET",
|
|
"archive": false
|
|
},
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|
{
|
|
"tag": "P9-LAMP-SCHEDULE.PV",
|
|
"addr": 6342,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
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|
{
|
|
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|
|
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|
|
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|
|
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|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
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|
{
|
|
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|
|
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|
|
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|
|
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|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
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|
{
|
|
"tag": "P9Z1-AM-SEL.PV",
|
|
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|
|
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|
|
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|
|
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|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
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|
|
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|
{
|
|
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|
|
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|
|
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|
|
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|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-9118.OP",
|
|
"addr": 6348,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
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|
{
|
|
"tag": "P9Z2-AM-SEL.PV",
|
|
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|
|
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|
|
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|
|
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|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
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|
|
{
|
|
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|
|
"addr": 6350,
|
|
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|
|
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|
|
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|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-9116.OP",
|
|
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|
|
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|
|
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|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P9Z3-AM-SEL.PV",
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P9Z3-AM-SEL.OP",
|
|
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|
|
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|
|
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|
|
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|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-9121.OP",
|
|
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|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P9Z4-AM-SEL.PV",
|
|
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|
|
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|
|
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|
|
"type": "float32",
|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
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|
{
|
|
"tag": "P9Z4-AM-SEL.OP",
|
|
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|
|
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|
|
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|
|
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|
|
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|
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|
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|
},
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|
{
|
|
"tag": "P-9122.OP",
|
|
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|
|
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|
|
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|
|
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|
|
"access": "RW",
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|
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|
|
"archive": false
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|
},
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|
{
|
|
"tag": "P9Z1-MAN-ON.PV",
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|
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|
|
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|
|
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|
|
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|
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|
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|
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|
},
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|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
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|
|
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|
|
},
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|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
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|
|
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|
|
},
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|
{
|
|
"tag": "P9Z2-MAN-ON.PV",
|
|
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|
|
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|
|
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|
|
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|
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|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RESET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PIC-9211A-IL-RST.PV",
|
|
"addr": 6442,
|
|
"write_addr": 6442,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PIC-9211A-IL-RST.OP",
|
|
"addr": 6442,
|
|
"write_addr": 6442,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-9213-IL-RST.PV",
|
|
"addr": 6444,
|
|
"write_addr": 6444,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-9213-IL-RST.OP",
|
|
"addr": 6444,
|
|
"write_addr": 6444,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-6226A.OP",
|
|
"addr": 6446,
|
|
"write_addr": 6446,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-9101.HZSET",
|
|
"addr": 6448,
|
|
"write_addr": 6448,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter HZSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P9C2-MAN-ESD.PV",
|
|
"addr": 6450,
|
|
"write_addr": 6450,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P9C2-MAN-ESD.OP",
|
|
"addr": 6450,
|
|
"write_addr": 6450,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "9200-ESD-RST.PV",
|
|
"addr": 6452,
|
|
"write_addr": 6452,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "9200-ESD-RST.OP",
|
|
"addr": 6452,
|
|
"write_addr": 6452,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "9200-ESD.RST",
|
|
"addr": 6452,
|
|
"write_addr": 6452,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-9100.RST",
|
|
"addr": 6454,
|
|
"write_addr": 6454,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9101.RST",
|
|
"addr": 6456,
|
|
"write_addr": 6456,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-9113.RST",
|
|
"addr": 6458,
|
|
"write_addr": 6458,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9113.RST",
|
|
"addr": 6458,
|
|
"write_addr": 6458,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-9115.RST",
|
|
"addr": 6460,
|
|
"write_addr": 6460,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-9118.RST",
|
|
"addr": 6462,
|
|
"write_addr": 6462,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9118.RST",
|
|
"addr": 6462,
|
|
"write_addr": 6462,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-9201.RST",
|
|
"addr": 6464,
|
|
"write_addr": 6464,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.RST",
|
|
"addr": 6464,
|
|
"write_addr": 6464,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-9116.RST",
|
|
"addr": 6466,
|
|
"write_addr": 6466,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9116.RST",
|
|
"addr": 6466,
|
|
"write_addr": 6466,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-9114.RST",
|
|
"addr": 6468,
|
|
"write_addr": 6468,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9114.RST",
|
|
"addr": 6468,
|
|
"write_addr": 6468,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-9218.RST",
|
|
"addr": 6470,
|
|
"write_addr": 6470,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.RST",
|
|
"addr": 6470,
|
|
"write_addr": 6470,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-9216.RST",
|
|
"addr": 6472,
|
|
"write_addr": 6472,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.RST",
|
|
"addr": 6472,
|
|
"write_addr": 6472,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-9213.RST",
|
|
"addr": 6474,
|
|
"write_addr": 6474,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.RST",
|
|
"addr": 6474,
|
|
"write_addr": 6474,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-9215.RST",
|
|
"addr": 6476,
|
|
"write_addr": 6476,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-9215.RST",
|
|
"addr": 6476,
|
|
"write_addr": 6476,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-9214.RST",
|
|
"addr": 6478,
|
|
"write_addr": 6478,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.RST",
|
|
"addr": 6478,
|
|
"write_addr": 6478,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-9201.HZSET",
|
|
"addr": 6480,
|
|
"write_addr": 6480,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter HZSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-6127.RST",
|
|
"addr": 6482,
|
|
"write_addr": 6482,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-6227.RST",
|
|
"addr": 6484,
|
|
"write_addr": 6484,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-9120.RST",
|
|
"addr": 6486,
|
|
"write_addr": 6486,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-9125.OP",
|
|
"addr": 6488,
|
|
"write_addr": 6488,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10101.OP",
|
|
"addr": 6490,
|
|
"write_addr": 6490,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-9102.HZSET",
|
|
"addr": 6490,
|
|
"write_addr": 6490,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter HZSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10114.OP",
|
|
"addr": 6492,
|
|
"write_addr": 6492,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10118.OP",
|
|
"addr": 6494,
|
|
"write_addr": 6494,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10116.OP",
|
|
"addr": 6496,
|
|
"write_addr": 6496,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10201.OP",
|
|
"addr": 6498,
|
|
"write_addr": 6498,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10214.OP",
|
|
"addr": 6500,
|
|
"write_addr": 6500,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10218.OP",
|
|
"addr": 6502,
|
|
"write_addr": 6502,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10216.OP",
|
|
"addr": 6504,
|
|
"write_addr": 6504,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "VP-10117.OP",
|
|
"addr": 6506,
|
|
"write_addr": 6506,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "VP-10217.OP",
|
|
"addr": 6508,
|
|
"write_addr": 6508,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10128A.OP",
|
|
"addr": 6510,
|
|
"write_addr": 6510,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10128B.OP",
|
|
"addr": 6512,
|
|
"write_addr": 6512,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-1011A-IL-RST.PV",
|
|
"addr": 6514,
|
|
"write_addr": 6514,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-1011A-IL-RST.OP",
|
|
"addr": 6514,
|
|
"write_addr": 6514,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A-TRIP.RESET",
|
|
"addr": 6514,
|
|
"write_addr": 6514,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RESET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A-IL-RST.PV",
|
|
"addr": 6516,
|
|
"write_addr": 6516,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A-IL-RST.OP",
|
|
"addr": 6516,
|
|
"write_addr": 6516,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A-TRIP.RESET",
|
|
"addr": 6516,
|
|
"write_addr": 6516,
|
|
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{
|
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"tag": "LIA-10111.SP",
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|
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"tag": "LIA-10211.SP",
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TIC-9111A-HI-IL.PV",
|
|
"addr": 8298,
|
|
"write_addr": 8298,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TIC-9111A-HI-ESD.PV",
|
|
"addr": 8300,
|
|
"write_addr": 8300,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "9100-MAN-ESD.PV",
|
|
"addr": 8302,
|
|
"write_addr": 8302,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PIC-9111A-LO-ESD.PV",
|
|
"addr": 8304,
|
|
"write_addr": 8304,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-9113-LO-IL.PV",
|
|
"addr": 8306,
|
|
"write_addr": 8306,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-9213-LO-ESD.PV",
|
|
"addr": 8308,
|
|
"write_addr": 8308,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-9213-LO-IL.PV",
|
|
"addr": 8310,
|
|
"write_addr": 8310,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TIC-9211A-HI-ESD.PV",
|
|
"addr": 8312,
|
|
"write_addr": 8312,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TIC-9211A-HI-IL.PV",
|
|
"addr": 8314,
|
|
"write_addr": 8314,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PIC-9211A-LO-ESD.PV",
|
|
"addr": 8316,
|
|
"write_addr": 8316,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PIC-9211A-LO-IL.PV",
|
|
"addr": 8318,
|
|
"write_addr": 8318,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "9200-MAN-ESD.PV",
|
|
"addr": 8320,
|
|
"write_addr": 8320,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TIC-9111A-TRIP.PV",
|
|
"addr": 8322,
|
|
"write_addr": 8322,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PIC-9111A-TRIP.PV",
|
|
"addr": 8324,
|
|
"write_addr": 8324,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-9113-TRIP.PV",
|
|
"addr": 8326,
|
|
"write_addr": 8326,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TIC-9211A-TRIP.PV",
|
|
"addr": 8328,
|
|
"write_addr": 8328,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PIC-9211A-TRIP.PV",
|
|
"addr": 8330,
|
|
"write_addr": 8330,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-9213-TRIP.PV",
|
|
"addr": 8332,
|
|
"write_addr": 8332,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-9100.QV",
|
|
"addr": 8338,
|
|
"write_addr": 8338,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint aux QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9101.QV",
|
|
"addr": 8340,
|
|
"write_addr": 8340,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FIQ-9115.QV",
|
|
"addr": 8342,
|
|
"write_addr": 8342,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint aux QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-9113.PV",
|
|
"addr": 8344,
|
|
"write_addr": 8344,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9113.QV",
|
|
"addr": 8344,
|
|
"write_addr": 8344,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-9215.PV",
|
|
"addr": 8346,
|
|
"write_addr": 8346,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FIQ-9215.QV",
|
|
"addr": 8346,
|
|
"write_addr": 8346,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint aux QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FIQ-9115.PV",
|
|
"addr": 8348,
|
|
"write_addr": 8348,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-9114.PV",
|
|
"addr": 8350,
|
|
"write_addr": 8350,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9114.QV",
|
|
"addr": 8350,
|
|
"write_addr": 8350,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-9116.PV",
|
|
"addr": 8352,
|
|
"write_addr": 8352,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9116.QV",
|
|
"addr": 8352,
|
|
"write_addr": 8352,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-9118.PV",
|
|
"addr": 8354,
|
|
"write_addr": 8354,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9118.QV",
|
|
"addr": 8354,
|
|
"write_addr": 8354,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-9201.PV",
|
|
"addr": 8356,
|
|
"write_addr": 8356,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9201.QV",
|
|
"addr": 8356,
|
|
"write_addr": 8356,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-9213.PV",
|
|
"addr": 8358,
|
|
"write_addr": 8358,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9213.QV",
|
|
"addr": 8358,
|
|
"write_addr": 8358,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-9218.PV",
|
|
"addr": 8360,
|
|
"write_addr": 8360,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9218.QV",
|
|
"addr": 8360,
|
|
"write_addr": 8360,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-9216.PV",
|
|
"addr": 8362,
|
|
"write_addr": 8362,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9216.QV",
|
|
"addr": 8362,
|
|
"write_addr": 8362,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-9214.PV",
|
|
"addr": 8364,
|
|
"write_addr": 8364,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-9214.QV",
|
|
"addr": 8364,
|
|
"write_addr": 8364,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "9100-ESD.PV",
|
|
"addr": 8366,
|
|
"write_addr": 8366,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "9200-ESD.PV",
|
|
"addr": 8368,
|
|
"write_addr": 8368,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "F-9601.STATE",
|
|
"addr": 8370,
|
|
"write_addr": 8370,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "F-10601.STATE",
|
|
"addr": 8370,
|
|
"write_addr": 8370,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P9Z1-LAMP.PV",
|
|
"addr": 8372,
|
|
"write_addr": 8372,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P9Z2-LAMP.PV",
|
|
"addr": 8374,
|
|
"write_addr": 8374,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P9Z3-LAMP.PV",
|
|
"addr": 8376,
|
|
"write_addr": 8376,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P9Z4-LAMP.PV",
|
|
"addr": 8378,
|
|
"write_addr": 8378,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-9215.PV",
|
|
"addr": 8380,
|
|
"write_addr": 8380,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "P-9118.HZ",
|
|
"addr": 8382,
|
|
"write_addr": 8382,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter HZ",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-6121.PV",
|
|
"addr": 8388,
|
|
"write_addr": 8388,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-6122.PV",
|
|
"addr": 8390,
|
|
"write_addr": 8390,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-6221.PV",
|
|
"addr": 8392,
|
|
"write_addr": 8392,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-6222.PV",
|
|
"addr": 8394,
|
|
"write_addr": 8394,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-9128.PV",
|
|
"addr": 8396,
|
|
"write_addr": 8396,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LI-8121.PV",
|
|
"addr": 8398,
|
|
"write_addr": 8398,
|
|
"count": 2,
|
|
"type": "float32",
|
|
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|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10602A.PV",
|
|
"addr": 8764,
|
|
"write_addr": 8764,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10602B.PV",
|
|
"addr": 8766,
|
|
"write_addr": 8766,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "VP-10217.PV",
|
|
"addr": 8768,
|
|
"write_addr": 8768,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "F-10601.PV",
|
|
"addr": 8770,
|
|
"write_addr": 8770,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10111A-TRIP.PV",
|
|
"addr": 8796,
|
|
"write_addr": 8796,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10111A-TRIP.PV",
|
|
"addr": 8798,
|
|
"write_addr": 8798,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PT-10111A-FAIL.PV",
|
|
"addr": 8800,
|
|
"write_addr": 8800,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PT-10211A-FAIL.PV",
|
|
"addr": 8802,
|
|
"write_addr": 8802,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10113-TRIP.PV",
|
|
"addr": 8804,
|
|
"write_addr": 8804,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A-TRIP.PV",
|
|
"addr": 8810,
|
|
"write_addr": 8810,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A-TRIP.PV",
|
|
"addr": 8812,
|
|
"write_addr": 8812,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213-TRIP.PV",
|
|
"addr": 8814,
|
|
"write_addr": 8814,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PI-10900I.PV",
|
|
"addr": 8820,
|
|
"write_addr": 8820,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PI-10900F.PV",
|
|
"addr": 8822,
|
|
"write_addr": 8822,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PI-10700.PV",
|
|
"addr": 8824,
|
|
"write_addr": 8824,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LI-10128.PV",
|
|
"addr": 8838,
|
|
"write_addr": 8838,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LI-10101.PV",
|
|
"addr": 8840,
|
|
"write_addr": 8840,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "10100-MAN-ESD.PV",
|
|
"addr": 8846,
|
|
"write_addr": 8846,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "10200-MAN-ESD.PV",
|
|
"addr": 8848,
|
|
"write_addr": 8848,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "10200-ESD.PV",
|
|
"addr": 8852,
|
|
"write_addr": 8852,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "10100-ESD.PV",
|
|
"addr": 8854,
|
|
"write_addr": 8854,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "POJANG-NOSCAN.PV",
|
|
"addr": 8862,
|
|
"write_addr": 8862,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "POJANG-BAD-COM.PV",
|
|
"addr": 8864,
|
|
"write_addr": 8864,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10800B.PV",
|
|
"addr": 8866,
|
|
"write_addr": 8866,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-10101.PV",
|
|
"addr": 8870,
|
|
"write_addr": 8870,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LI-10200.PV",
|
|
"addr": 8870,
|
|
"write_addr": 8870,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "XV-10111.PV",
|
|
"addr": 8872,
|
|
"write_addr": 8872,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-10211.PV",
|
|
"addr": 8874,
|
|
"write_addr": 8874,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-10211.PV",
|
|
"addr": 8876,
|
|
"write_addr": 8876,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LI-10201.PV",
|
|
"addr": 8878,
|
|
"write_addr": 8878,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LI-10221.PV",
|
|
"addr": 8880,
|
|
"write_addr": 8880,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LI-10800.PV",
|
|
"addr": 8882,
|
|
"write_addr": 8882,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "XV-1020N2.PV",
|
|
"addr": 8884,
|
|
"write_addr": 8884,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.QV",
|
|
"addr": 8884,
|
|
"write_addr": 8884,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "XV-1010N2.PV",
|
|
"addr": 8886,
|
|
"write_addr": 8886,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10221.PV",
|
|
"addr": 8888,
|
|
"write_addr": 8888,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PT-9211A-FAIL.PV",
|
|
"addr": 8890,
|
|
"write_addr": 8890,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PT-9111A-FAIL.PV",
|
|
"addr": 8894,
|
|
"write_addr": 8894,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-10215.QV",
|
|
"addr": 8896,
|
|
"write_addr": 8896,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint aux QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10101.QV",
|
|
"addr": 8898,
|
|
"write_addr": 8898,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FIQ-10115.QV",
|
|
"addr": 8900,
|
|
"write_addr": 8900,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint aux QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10113.QV",
|
|
"addr": 8902,
|
|
"write_addr": 8902,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FIQ-10115.PV",
|
|
"addr": 8904,
|
|
"write_addr": 8904,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10114A.QV",
|
|
"addr": 8906,
|
|
"write_addr": 8906,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10116.QV",
|
|
"addr": 8908,
|
|
"write_addr": 8908,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10118.QV",
|
|
"addr": 8910,
|
|
"write_addr": 8910,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.QV",
|
|
"addr": 8912,
|
|
"write_addr": 8912,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.QV",
|
|
"addr": 8914,
|
|
"write_addr": 8914,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.QV",
|
|
"addr": 8916,
|
|
"write_addr": 8916,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.QV",
|
|
"addr": 8920,
|
|
"write_addr": 8920,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "P10Z1-LAMP.PV",
|
|
"addr": 8922,
|
|
"write_addr": 8922,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P10Z2-LAMP.PV",
|
|
"addr": 8924,
|
|
"write_addr": 8924,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P10Z3-LAMP.PV",
|
|
"addr": 8926,
|
|
"write_addr": 8926,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P10Z4-LAMP.PV",
|
|
"addr": 8928,
|
|
"write_addr": 8928,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "VP-9117.STATE",
|
|
"addr": 8940,
|
|
"write_addr": 8940,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-9114.STATE",
|
|
"addr": 8942,
|
|
"write_addr": 8942,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "VP-9217.STATE",
|
|
"addr": 8944,
|
|
"write_addr": 8944,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-9214.STATE",
|
|
"addr": 8946,
|
|
"write_addr": 8946,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "VP-10117.STATE",
|
|
"addr": 8948,
|
|
"write_addr": 8948,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "VP-10217.STATE",
|
|
"addr": 8950,
|
|
"write_addr": 8950,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10114.STATE",
|
|
"addr": 8952,
|
|
"write_addr": 8952,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-10214.STATE",
|
|
"addr": 8954,
|
|
"write_addr": 8954,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.PV",
|
|
"addr": 30784,
|
|
"write_addr": 30784,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #25 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.RSP_SP2",
|
|
"addr": 30786,
|
|
"write_addr": 30786,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.SP",
|
|
"addr": 30788,
|
|
"write_addr": 30788,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Output",
|
|
"addr": 30790,
|
|
"write_addr": 30790,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.PV_B",
|
|
"addr": 30792,
|
|
"write_addr": 30792,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #25 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.CarbonPotTemp",
|
|
"addr": 30794,
|
|
"write_addr": 30794,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #25 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.GAIN",
|
|
"addr": 30796,
|
|
"write_addr": 30796,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Direction",
|
|
"addr": 30798,
|
|
"write_addr": 30798,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #25 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.RESET",
|
|
"addr": 30800,
|
|
"write_addr": 30800,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.RATE",
|
|
"addr": 30802,
|
|
"write_addr": 30802,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.CycleTime1",
|
|
"addr": 30804,
|
|
"write_addr": 30804,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #25 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.PV_LowRange",
|
|
"addr": 30806,
|
|
"write_addr": 30806,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #25 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.PV_HighRange",
|
|
"addr": 30808,
|
|
"write_addr": 30808,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #25 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Alarm1SP1",
|
|
"addr": 30810,
|
|
"write_addr": 30810,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.AL1SP1",
|
|
"addr": 30810,
|
|
"write_addr": 30810,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Alarm1SP2",
|
|
"addr": 30812,
|
|
"write_addr": 30812,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Gain2",
|
|
"addr": 30816,
|
|
"write_addr": 30816,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.StepDeadband",
|
|
"addr": 30818,
|
|
"write_addr": 30818,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Reset2",
|
|
"addr": 30820,
|
|
"write_addr": 30820,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Rate2",
|
|
"addr": 30822,
|
|
"write_addr": 30822,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.CycleTime2",
|
|
"addr": 30824,
|
|
"write_addr": 30824,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #25 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.LSP1",
|
|
"addr": 30826,
|
|
"write_addr": 30826,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.LSP2",
|
|
"addr": 30828,
|
|
"write_addr": 30828,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Alarm2SP1",
|
|
"addr": 30830,
|
|
"write_addr": 30830,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.AL2SP1",
|
|
"addr": 30830,
|
|
"write_addr": 30830,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Alarm2SP2",
|
|
"addr": 30832,
|
|
"write_addr": 30832,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.SP_LowLimit",
|
|
"addr": 30836,
|
|
"write_addr": 30836,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.SP_HighLimit",
|
|
"addr": 30838,
|
|
"write_addr": 30838,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.WSP_B",
|
|
"addr": 30840,
|
|
"write_addr": 30840,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Output_LowLimit",
|
|
"addr": 30842,
|
|
"write_addr": 30842,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Output_HighLimit",
|
|
"addr": 30844,
|
|
"write_addr": 30844,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.OP",
|
|
"addr": 30846,
|
|
"write_addr": 30846,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Ratio",
|
|
"addr": 30854,
|
|
"write_addr": 30854,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Bias",
|
|
"addr": 30856,
|
|
"write_addr": 30856,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.Deviation",
|
|
"addr": 30858,
|
|
"write_addr": 30858,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #25 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.ManualReset",
|
|
"addr": 30862,
|
|
"write_addr": 30862,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.FeedforwardGain",
|
|
"addr": 30864,
|
|
"write_addr": 30864,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.LocalPctCO",
|
|
"addr": 30866,
|
|
"write_addr": 30866,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.FurnaceFactor",
|
|
"addr": 30868,
|
|
"write_addr": 30868,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.PercentHydrogen",
|
|
"addr": 30870,
|
|
"write_addr": 30870,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.OnOffHysteresis",
|
|
"addr": 30872,
|
|
"write_addr": 30872,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.CarbPotDewpt",
|
|
"addr": 30874,
|
|
"write_addr": 30874,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.StepMotorTime",
|
|
"addr": 30876,
|
|
"write_addr": 30876,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #25 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.FuzzyEnable",
|
|
"addr": 30967,
|
|
"write_addr": 30967,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #25 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.DemandTune",
|
|
"addr": 30968,
|
|
"write_addr": 30968,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #25 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.AntiSootEnable",
|
|
"addr": 30969,
|
|
"write_addr": 30969,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #25 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.AutoManState",
|
|
"addr": 30970,
|
|
"write_addr": 30970,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #25 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.SP_SelectState",
|
|
"addr": 30971,
|
|
"write_addr": 30971,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #25 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.RemLocSPState",
|
|
"addr": 30972,
|
|
"write_addr": 30972,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #25 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.TuneSetState",
|
|
"addr": 30973,
|
|
"write_addr": 30973,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #25 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10201.MD",
|
|
"addr": 30974,
|
|
"write_addr": 30970,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #25 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.PV",
|
|
"addr": 31040,
|
|
"write_addr": 31040,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #26 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.RSP_SP2",
|
|
"addr": 31042,
|
|
"write_addr": 31042,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.SP",
|
|
"addr": 31044,
|
|
"write_addr": 31044,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Output",
|
|
"addr": 31046,
|
|
"write_addr": 31046,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.PV_B",
|
|
"addr": 31048,
|
|
"write_addr": 31048,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #26 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.CarbonPotTemp",
|
|
"addr": 31050,
|
|
"write_addr": 31050,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #26 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.GAIN",
|
|
"addr": 31052,
|
|
"write_addr": 31052,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Direction",
|
|
"addr": 31054,
|
|
"write_addr": 31054,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #26 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.RESET",
|
|
"addr": 31056,
|
|
"write_addr": 31056,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.RATE",
|
|
"addr": 31058,
|
|
"write_addr": 31058,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.CycleTime1",
|
|
"addr": 31060,
|
|
"write_addr": 31060,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #26 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.PV_LowRange",
|
|
"addr": 31062,
|
|
"write_addr": 31062,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #26 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.PV_HighRange",
|
|
"addr": 31064,
|
|
"write_addr": 31064,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #26 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Alarm1SP1",
|
|
"addr": 31066,
|
|
"write_addr": 31066,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.AL1SP1",
|
|
"addr": 31066,
|
|
"write_addr": 31066,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Alarm1SP2",
|
|
"addr": 31068,
|
|
"write_addr": 31068,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Gain2",
|
|
"addr": 31072,
|
|
"write_addr": 31072,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.StepDeadband",
|
|
"addr": 31074,
|
|
"write_addr": 31074,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Reset2",
|
|
"addr": 31076,
|
|
"write_addr": 31076,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Rate2",
|
|
"addr": 31078,
|
|
"write_addr": 31078,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.CycleTime2",
|
|
"addr": 31080,
|
|
"write_addr": 31080,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #26 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.LSP1",
|
|
"addr": 31082,
|
|
"write_addr": 31082,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.LSP2",
|
|
"addr": 31084,
|
|
"write_addr": 31084,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Alarm2SP1",
|
|
"addr": 31086,
|
|
"write_addr": 31086,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.AL2SP1",
|
|
"addr": 31086,
|
|
"write_addr": 31086,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Alarm2SP2",
|
|
"addr": 31088,
|
|
"write_addr": 31088,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.SP_LowLimit",
|
|
"addr": 31092,
|
|
"write_addr": 31092,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.SP_HighLimit",
|
|
"addr": 31094,
|
|
"write_addr": 31094,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.WSP_B",
|
|
"addr": 31096,
|
|
"write_addr": 31096,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Output_LowLimit",
|
|
"addr": 31098,
|
|
"write_addr": 31098,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Output_HighLimit",
|
|
"addr": 31100,
|
|
"write_addr": 31100,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.OP",
|
|
"addr": 31102,
|
|
"write_addr": 31102,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Ratio",
|
|
"addr": 31110,
|
|
"write_addr": 31110,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Bias",
|
|
"addr": 31112,
|
|
"write_addr": 31112,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.Deviation",
|
|
"addr": 31114,
|
|
"write_addr": 31114,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #26 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.ManualReset",
|
|
"addr": 31118,
|
|
"write_addr": 31118,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.FeedforwardGain",
|
|
"addr": 31120,
|
|
"write_addr": 31120,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.LocalPctCO",
|
|
"addr": 31122,
|
|
"write_addr": 31122,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.FurnaceFactor",
|
|
"addr": 31124,
|
|
"write_addr": 31124,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.PercentHydrogen",
|
|
"addr": 31126,
|
|
"write_addr": 31126,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.OnOffHysteresis",
|
|
"addr": 31128,
|
|
"write_addr": 31128,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.CarbPotDewpt",
|
|
"addr": 31130,
|
|
"write_addr": 31130,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.StepMotorTime",
|
|
"addr": 31132,
|
|
"write_addr": 31132,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #26 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.FuzzyEnable",
|
|
"addr": 31223,
|
|
"write_addr": 31223,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #26 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.DemandTune",
|
|
"addr": 31224,
|
|
"write_addr": 31224,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #26 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.AntiSootEnable",
|
|
"addr": 31225,
|
|
"write_addr": 31225,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #26 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.AutoManState",
|
|
"addr": 31226,
|
|
"write_addr": 31226,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #26 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.SP_SelectState",
|
|
"addr": 31227,
|
|
"write_addr": 31227,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #26 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.RemLocSPState",
|
|
"addr": 31228,
|
|
"write_addr": 31228,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #26 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.TuneSetState",
|
|
"addr": 31229,
|
|
"write_addr": 31229,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #26 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10213.MD",
|
|
"addr": 31230,
|
|
"write_addr": 31226,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #26 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.PV",
|
|
"addr": 31296,
|
|
"write_addr": 31296,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #27 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.RSP_SP2",
|
|
"addr": 31298,
|
|
"write_addr": 31298,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.SP",
|
|
"addr": 31300,
|
|
"write_addr": 31300,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Output",
|
|
"addr": 31302,
|
|
"write_addr": 31302,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.PV_B",
|
|
"addr": 31304,
|
|
"write_addr": 31304,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #27 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.CarbonPotTemp",
|
|
"addr": 31306,
|
|
"write_addr": 31306,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #27 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.GAIN",
|
|
"addr": 31308,
|
|
"write_addr": 31308,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Direction",
|
|
"addr": 31310,
|
|
"write_addr": 31310,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #27 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.RESET",
|
|
"addr": 31312,
|
|
"write_addr": 31312,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.RATE",
|
|
"addr": 31314,
|
|
"write_addr": 31314,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.CycleTime1",
|
|
"addr": 31316,
|
|
"write_addr": 31316,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #27 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.PV_LowRange",
|
|
"addr": 31318,
|
|
"write_addr": 31318,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #27 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.PV_HighRange",
|
|
"addr": 31320,
|
|
"write_addr": 31320,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #27 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Alarm1SP1",
|
|
"addr": 31322,
|
|
"write_addr": 31322,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.AL1SP1",
|
|
"addr": 31322,
|
|
"write_addr": 31322,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Alarm1SP2",
|
|
"addr": 31324,
|
|
"write_addr": 31324,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Gain2",
|
|
"addr": 31328,
|
|
"write_addr": 31328,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.StepDeadband",
|
|
"addr": 31330,
|
|
"write_addr": 31330,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Reset2",
|
|
"addr": 31332,
|
|
"write_addr": 31332,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Rate2",
|
|
"addr": 31334,
|
|
"write_addr": 31334,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.CycleTime2",
|
|
"addr": 31336,
|
|
"write_addr": 31336,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #27 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.LSP1",
|
|
"addr": 31338,
|
|
"write_addr": 31338,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.LSP2",
|
|
"addr": 31340,
|
|
"write_addr": 31340,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Alarm2SP1",
|
|
"addr": 31342,
|
|
"write_addr": 31342,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.AL2SP1",
|
|
"addr": 31342,
|
|
"write_addr": 31342,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Alarm2SP2",
|
|
"addr": 31344,
|
|
"write_addr": 31344,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.SP_LowLimit",
|
|
"addr": 31348,
|
|
"write_addr": 31348,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.SP_HighLimit",
|
|
"addr": 31350,
|
|
"write_addr": 31350,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.WSP_B",
|
|
"addr": 31352,
|
|
"write_addr": 31352,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Output_LowLimit",
|
|
"addr": 31354,
|
|
"write_addr": 31354,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Output_HighLimit",
|
|
"addr": 31356,
|
|
"write_addr": 31356,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.OP",
|
|
"addr": 31358,
|
|
"write_addr": 31358,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Ratio",
|
|
"addr": 31366,
|
|
"write_addr": 31366,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Bias",
|
|
"addr": 31368,
|
|
"write_addr": 31368,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.Deviation",
|
|
"addr": 31370,
|
|
"write_addr": 31370,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #27 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.ManualReset",
|
|
"addr": 31374,
|
|
"write_addr": 31374,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.FeedforwardGain",
|
|
"addr": 31376,
|
|
"write_addr": 31376,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.LocalPctCO",
|
|
"addr": 31378,
|
|
"write_addr": 31378,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.FurnaceFactor",
|
|
"addr": 31380,
|
|
"write_addr": 31380,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.PercentHydrogen",
|
|
"addr": 31382,
|
|
"write_addr": 31382,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.OnOffHysteresis",
|
|
"addr": 31384,
|
|
"write_addr": 31384,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.CarbPotDewpt",
|
|
"addr": 31386,
|
|
"write_addr": 31386,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.StepMotorTime",
|
|
"addr": 31388,
|
|
"write_addr": 31388,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #27 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.FuzzyEnable",
|
|
"addr": 31479,
|
|
"write_addr": 31479,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #27 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.DemandTune",
|
|
"addr": 31480,
|
|
"write_addr": 31480,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #27 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.AntiSootEnable",
|
|
"addr": 31481,
|
|
"write_addr": 31481,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #27 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.AutoManState",
|
|
"addr": 31482,
|
|
"write_addr": 31482,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #27 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.SP_SelectState",
|
|
"addr": 31483,
|
|
"write_addr": 31483,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #27 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.RemLocSPState",
|
|
"addr": 31484,
|
|
"write_addr": 31484,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #27 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.TuneSetState",
|
|
"addr": 31485,
|
|
"write_addr": 31485,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #27 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10214.MD",
|
|
"addr": 31486,
|
|
"write_addr": 31482,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #27 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.PV",
|
|
"addr": 31552,
|
|
"write_addr": 31552,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #28 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.RSP_SP2",
|
|
"addr": 31554,
|
|
"write_addr": 31554,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.SP",
|
|
"addr": 31556,
|
|
"write_addr": 31556,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Output",
|
|
"addr": 31558,
|
|
"write_addr": 31558,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.PV_B",
|
|
"addr": 31560,
|
|
"write_addr": 31560,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #28 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.CarbonPotTemp",
|
|
"addr": 31562,
|
|
"write_addr": 31562,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #28 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.GAIN",
|
|
"addr": 31564,
|
|
"write_addr": 31564,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Direction",
|
|
"addr": 31566,
|
|
"write_addr": 31566,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #28 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.RESET",
|
|
"addr": 31568,
|
|
"write_addr": 31568,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.RATE",
|
|
"addr": 31570,
|
|
"write_addr": 31570,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.CycleTime1",
|
|
"addr": 31572,
|
|
"write_addr": 31572,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #28 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.PV_LowRange",
|
|
"addr": 31574,
|
|
"write_addr": 31574,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #28 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.PV_HighRange",
|
|
"addr": 31576,
|
|
"write_addr": 31576,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #28 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Alarm1SP1",
|
|
"addr": 31578,
|
|
"write_addr": 31578,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.AL1SP1",
|
|
"addr": 31578,
|
|
"write_addr": 31578,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Alarm1SP2",
|
|
"addr": 31580,
|
|
"write_addr": 31580,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Gain2",
|
|
"addr": 31584,
|
|
"write_addr": 31584,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.StepDeadband",
|
|
"addr": 31586,
|
|
"write_addr": 31586,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Reset2",
|
|
"addr": 31588,
|
|
"write_addr": 31588,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Rate2",
|
|
"addr": 31590,
|
|
"write_addr": 31590,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.CycleTime2",
|
|
"addr": 31592,
|
|
"write_addr": 31592,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #28 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.LSP1",
|
|
"addr": 31594,
|
|
"write_addr": 31594,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.LSP2",
|
|
"addr": 31596,
|
|
"write_addr": 31596,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Alarm2SP1",
|
|
"addr": 31598,
|
|
"write_addr": 31598,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.AL2SP1",
|
|
"addr": 31598,
|
|
"write_addr": 31598,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Alarm2SP2",
|
|
"addr": 31600,
|
|
"write_addr": 31600,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.SP_LowLimit",
|
|
"addr": 31604,
|
|
"write_addr": 31604,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.SP_HighLimit",
|
|
"addr": 31606,
|
|
"write_addr": 31606,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.WSP_B",
|
|
"addr": 31608,
|
|
"write_addr": 31608,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Output_LowLimit",
|
|
"addr": 31610,
|
|
"write_addr": 31610,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Output_HighLimit",
|
|
"addr": 31612,
|
|
"write_addr": 31612,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.OP",
|
|
"addr": 31614,
|
|
"write_addr": 31614,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Ratio",
|
|
"addr": 31622,
|
|
"write_addr": 31622,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Bias",
|
|
"addr": 31624,
|
|
"write_addr": 31624,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.Deviation",
|
|
"addr": 31626,
|
|
"write_addr": 31626,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #28 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.ManualReset",
|
|
"addr": 31630,
|
|
"write_addr": 31630,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.FeedforwardGain",
|
|
"addr": 31632,
|
|
"write_addr": 31632,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.LocalPctCO",
|
|
"addr": 31634,
|
|
"write_addr": 31634,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.FurnaceFactor",
|
|
"addr": 31636,
|
|
"write_addr": 31636,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.PercentHydrogen",
|
|
"addr": 31638,
|
|
"write_addr": 31638,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.OnOffHysteresis",
|
|
"addr": 31640,
|
|
"write_addr": 31640,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.CarbPotDewpt",
|
|
"addr": 31642,
|
|
"write_addr": 31642,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.StepMotorTime",
|
|
"addr": 31644,
|
|
"write_addr": 31644,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #28 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.FuzzyEnable",
|
|
"addr": 31735,
|
|
"write_addr": 31735,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #28 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.DemandTune",
|
|
"addr": 31736,
|
|
"write_addr": 31736,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #28 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.AntiSootEnable",
|
|
"addr": 31737,
|
|
"write_addr": 31737,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #28 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.AutoManState",
|
|
"addr": 31738,
|
|
"write_addr": 31738,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #28 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.SP_SelectState",
|
|
"addr": 31739,
|
|
"write_addr": 31739,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #28 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.RemLocSPState",
|
|
"addr": 31740,
|
|
"write_addr": 31740,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #28 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.TuneSetState",
|
|
"addr": 31741,
|
|
"write_addr": 31741,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #28 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10218.MD",
|
|
"addr": 31742,
|
|
"write_addr": 31738,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #28 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-10213.PV",
|
|
"addr": 31808,
|
|
"write_addr": 31808,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #29 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-10213.RSP_SP2",
|
|
"addr": 31810,
|
|
"write_addr": 31810,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.SP",
|
|
"addr": 31812,
|
|
"write_addr": 31812,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Output",
|
|
"addr": 31814,
|
|
"write_addr": 31814,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.PV_B",
|
|
"addr": 31816,
|
|
"write_addr": 31816,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #29 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.CarbonPotTemp",
|
|
"addr": 31818,
|
|
"write_addr": 31818,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #29 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.GAIN",
|
|
"addr": 31820,
|
|
"write_addr": 31820,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Direction",
|
|
"addr": 31822,
|
|
"write_addr": 31822,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #29 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.RESET",
|
|
"addr": 31824,
|
|
"write_addr": 31824,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.RATE",
|
|
"addr": 31826,
|
|
"write_addr": 31826,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.CycleTime1",
|
|
"addr": 31828,
|
|
"write_addr": 31828,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #29 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.PV_LowRange",
|
|
"addr": 31830,
|
|
"write_addr": 31830,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #29 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.PV_HighRange",
|
|
"addr": 31832,
|
|
"write_addr": 31832,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #29 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Alarm1SP1",
|
|
"addr": 31834,
|
|
"write_addr": 31834,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.AL1SP1",
|
|
"addr": 31834,
|
|
"write_addr": 31834,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Alarm1SP2",
|
|
"addr": 31836,
|
|
"write_addr": 31836,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Gain2",
|
|
"addr": 31840,
|
|
"write_addr": 31840,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.StepDeadband",
|
|
"addr": 31842,
|
|
"write_addr": 31842,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Reset2",
|
|
"addr": 31844,
|
|
"write_addr": 31844,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Rate2",
|
|
"addr": 31846,
|
|
"write_addr": 31846,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.CycleTime2",
|
|
"addr": 31848,
|
|
"write_addr": 31848,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #29 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.LSP1",
|
|
"addr": 31850,
|
|
"write_addr": 31850,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.LSP2",
|
|
"addr": 31852,
|
|
"write_addr": 31852,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Alarm2SP1",
|
|
"addr": 31854,
|
|
"write_addr": 31854,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.AL2SP1",
|
|
"addr": 31854,
|
|
"write_addr": 31854,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Alarm2SP2",
|
|
"addr": 31856,
|
|
"write_addr": 31856,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.SP_LowLimit",
|
|
"addr": 31860,
|
|
"write_addr": 31860,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.SP_HighLimit",
|
|
"addr": 31862,
|
|
"write_addr": 31862,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.WSP_B",
|
|
"addr": 31864,
|
|
"write_addr": 31864,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Output_LowLimit",
|
|
"addr": 31866,
|
|
"write_addr": 31866,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Output_HighLimit",
|
|
"addr": 31868,
|
|
"write_addr": 31868,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.OP",
|
|
"addr": 31870,
|
|
"write_addr": 31870,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Ratio",
|
|
"addr": 31878,
|
|
"write_addr": 31878,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Bias",
|
|
"addr": 31880,
|
|
"write_addr": 31880,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.Deviation",
|
|
"addr": 31882,
|
|
"write_addr": 31882,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #29 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.ManualReset",
|
|
"addr": 31886,
|
|
"write_addr": 31886,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.FeedforwardGain",
|
|
"addr": 31888,
|
|
"write_addr": 31888,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.LocalPctCO",
|
|
"addr": 31890,
|
|
"write_addr": 31890,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.FurnaceFactor",
|
|
"addr": 31892,
|
|
"write_addr": 31892,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.PercentHydrogen",
|
|
"addr": 31894,
|
|
"write_addr": 31894,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.OnOffHysteresis",
|
|
"addr": 31896,
|
|
"write_addr": 31896,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.CarbPotDewpt",
|
|
"addr": 31898,
|
|
"write_addr": 31898,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.StepMotorTime",
|
|
"addr": 31900,
|
|
"write_addr": 31900,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #29 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.FuzzyEnable",
|
|
"addr": 31991,
|
|
"write_addr": 31991,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #29 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.DemandTune",
|
|
"addr": 31992,
|
|
"write_addr": 31992,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #29 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.AntiSootEnable",
|
|
"addr": 31993,
|
|
"write_addr": 31993,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #29 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.AutoManState",
|
|
"addr": 31994,
|
|
"write_addr": 31994,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #29 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.SP_SelectState",
|
|
"addr": 31995,
|
|
"write_addr": 31995,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #29 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.RemLocSPState",
|
|
"addr": 31996,
|
|
"write_addr": 31996,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #29 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.TuneSetState",
|
|
"addr": 31997,
|
|
"write_addr": 31997,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #29 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-10213.MD",
|
|
"addr": 31998,
|
|
"write_addr": 31994,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #29 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.PV",
|
|
"addr": 32064,
|
|
"write_addr": 32064,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #30 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.RSP_SP2",
|
|
"addr": 32066,
|
|
"write_addr": 32066,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.SP",
|
|
"addr": 32068,
|
|
"write_addr": 32068,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Output",
|
|
"addr": 32070,
|
|
"write_addr": 32070,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.PV_B",
|
|
"addr": 32072,
|
|
"write_addr": 32072,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #30 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.CarbonPotTemp",
|
|
"addr": 32074,
|
|
"write_addr": 32074,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #30 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.GAIN",
|
|
"addr": 32076,
|
|
"write_addr": 32076,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Direction",
|
|
"addr": 32078,
|
|
"write_addr": 32078,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #30 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.RESET",
|
|
"addr": 32080,
|
|
"write_addr": 32080,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.RATE",
|
|
"addr": 32082,
|
|
"write_addr": 32082,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.CycleTime1",
|
|
"addr": 32084,
|
|
"write_addr": 32084,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #30 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.PV_LowRange",
|
|
"addr": 32086,
|
|
"write_addr": 32086,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #30 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.PV_HighRange",
|
|
"addr": 32088,
|
|
"write_addr": 32088,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #30 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Alarm1SP1",
|
|
"addr": 32090,
|
|
"write_addr": 32090,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.AL1SP1",
|
|
"addr": 32090,
|
|
"write_addr": 32090,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Alarm1SP2",
|
|
"addr": 32092,
|
|
"write_addr": 32092,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Gain2",
|
|
"addr": 32096,
|
|
"write_addr": 32096,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.StepDeadband",
|
|
"addr": 32098,
|
|
"write_addr": 32098,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Reset2",
|
|
"addr": 32100,
|
|
"write_addr": 32100,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Rate2",
|
|
"addr": 32102,
|
|
"write_addr": 32102,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.CycleTime2",
|
|
"addr": 32104,
|
|
"write_addr": 32104,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #30 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.LSP1",
|
|
"addr": 32106,
|
|
"write_addr": 32106,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.LSP2",
|
|
"addr": 32108,
|
|
"write_addr": 32108,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Alarm2SP1",
|
|
"addr": 32110,
|
|
"write_addr": 32110,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.AL2SP1",
|
|
"addr": 32110,
|
|
"write_addr": 32110,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Alarm2SP2",
|
|
"addr": 32112,
|
|
"write_addr": 32112,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.SP_LowLimit",
|
|
"addr": 32116,
|
|
"write_addr": 32116,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.SP_HighLimit",
|
|
"addr": 32118,
|
|
"write_addr": 32118,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.WSP_B",
|
|
"addr": 32120,
|
|
"write_addr": 32120,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Output_LowLimit",
|
|
"addr": 32122,
|
|
"write_addr": 32122,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Output_HighLimit",
|
|
"addr": 32124,
|
|
"write_addr": 32124,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.OP",
|
|
"addr": 32126,
|
|
"write_addr": 32126,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Ratio",
|
|
"addr": 32134,
|
|
"write_addr": 32134,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Bias",
|
|
"addr": 32136,
|
|
"write_addr": 32136,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.Deviation",
|
|
"addr": 32138,
|
|
"write_addr": 32138,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #30 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.ManualReset",
|
|
"addr": 32142,
|
|
"write_addr": 32142,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.FeedforwardGain",
|
|
"addr": 32144,
|
|
"write_addr": 32144,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.LocalPctCO",
|
|
"addr": 32146,
|
|
"write_addr": 32146,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.FurnaceFactor",
|
|
"addr": 32148,
|
|
"write_addr": 32148,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.PercentHydrogen",
|
|
"addr": 32150,
|
|
"write_addr": 32150,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.OnOffHysteresis",
|
|
"addr": 32152,
|
|
"write_addr": 32152,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.CarbPotDewpt",
|
|
"addr": 32154,
|
|
"write_addr": 32154,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.StepMotorTime",
|
|
"addr": 32156,
|
|
"write_addr": 32156,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #30 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.FuzzyEnable",
|
|
"addr": 32247,
|
|
"write_addr": 32247,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #30 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.DemandTune",
|
|
"addr": 32248,
|
|
"write_addr": 32248,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #30 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.AntiSootEnable",
|
|
"addr": 32249,
|
|
"write_addr": 32249,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #30 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.AutoManState",
|
|
"addr": 32250,
|
|
"write_addr": 32250,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #30 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.SP_SelectState",
|
|
"addr": 32251,
|
|
"write_addr": 32251,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #30 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.RemLocSPState",
|
|
"addr": 32252,
|
|
"write_addr": 32252,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #30 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.TuneSetState",
|
|
"addr": 32253,
|
|
"write_addr": 32253,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #30 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-10216.MD",
|
|
"addr": 32254,
|
|
"write_addr": 32250,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #30 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.PV",
|
|
"addr": 32320,
|
|
"write_addr": 32320,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #31 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.RSP_SP2",
|
|
"addr": 32322,
|
|
"write_addr": 32322,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.SP",
|
|
"addr": 32324,
|
|
"write_addr": 32324,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Output",
|
|
"addr": 32326,
|
|
"write_addr": 32326,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.PV_B",
|
|
"addr": 32328,
|
|
"write_addr": 32328,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #31 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.CarbonPotTemp",
|
|
"addr": 32330,
|
|
"write_addr": 32330,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #31 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.GAIN",
|
|
"addr": 32332,
|
|
"write_addr": 32332,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Direction",
|
|
"addr": 32334,
|
|
"write_addr": 32334,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #31 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.RESET",
|
|
"addr": 32336,
|
|
"write_addr": 32336,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.RATE",
|
|
"addr": 32338,
|
|
"write_addr": 32338,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.CycleTime1",
|
|
"addr": 32340,
|
|
"write_addr": 32340,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #31 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.PV_LowRange",
|
|
"addr": 32342,
|
|
"write_addr": 32342,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #31 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.PV_HighRange",
|
|
"addr": 32344,
|
|
"write_addr": 32344,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #31 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Alarm1SP1",
|
|
"addr": 32346,
|
|
"write_addr": 32346,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.AL1SP1",
|
|
"addr": 32346,
|
|
"write_addr": 32346,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Alarm1SP2",
|
|
"addr": 32348,
|
|
"write_addr": 32348,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Gain2",
|
|
"addr": 32352,
|
|
"write_addr": 32352,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.StepDeadband",
|
|
"addr": 32354,
|
|
"write_addr": 32354,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Reset2",
|
|
"addr": 32356,
|
|
"write_addr": 32356,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Rate2",
|
|
"addr": 32358,
|
|
"write_addr": 32358,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.CycleTime2",
|
|
"addr": 32360,
|
|
"write_addr": 32360,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #31 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.LSP1",
|
|
"addr": 32362,
|
|
"write_addr": 32362,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.LSP2",
|
|
"addr": 32364,
|
|
"write_addr": 32364,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Alarm2SP1",
|
|
"addr": 32366,
|
|
"write_addr": 32366,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.AL2SP1",
|
|
"addr": 32366,
|
|
"write_addr": 32366,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Alarm2SP2",
|
|
"addr": 32368,
|
|
"write_addr": 32368,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.SP_LowLimit",
|
|
"addr": 32372,
|
|
"write_addr": 32372,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.SP_HighLimit",
|
|
"addr": 32374,
|
|
"write_addr": 32374,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.WSP_B",
|
|
"addr": 32376,
|
|
"write_addr": 32376,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Output_LowLimit",
|
|
"addr": 32378,
|
|
"write_addr": 32378,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Output_HighLimit",
|
|
"addr": 32380,
|
|
"write_addr": 32380,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.OP",
|
|
"addr": 32382,
|
|
"write_addr": 32382,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Ratio",
|
|
"addr": 32390,
|
|
"write_addr": 32390,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Bias",
|
|
"addr": 32392,
|
|
"write_addr": 32392,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.Deviation",
|
|
"addr": 32394,
|
|
"write_addr": 32394,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #31 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.ManualReset",
|
|
"addr": 32398,
|
|
"write_addr": 32398,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.FeedforwardGain",
|
|
"addr": 32400,
|
|
"write_addr": 32400,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.LocalPctCO",
|
|
"addr": 32402,
|
|
"write_addr": 32402,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.FurnaceFactor",
|
|
"addr": 32404,
|
|
"write_addr": 32404,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.PercentHydrogen",
|
|
"addr": 32406,
|
|
"write_addr": 32406,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.OnOffHysteresis",
|
|
"addr": 32408,
|
|
"write_addr": 32408,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.CarbPotDewpt",
|
|
"addr": 32410,
|
|
"write_addr": 32410,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.StepMotorTime",
|
|
"addr": 32412,
|
|
"write_addr": 32412,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #31 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.FuzzyEnable",
|
|
"addr": 32503,
|
|
"write_addr": 32503,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #31 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.DemandTune",
|
|
"addr": 32504,
|
|
"write_addr": 32504,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #31 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.AntiSootEnable",
|
|
"addr": 32505,
|
|
"write_addr": 32505,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #31 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.AutoManState",
|
|
"addr": 32506,
|
|
"write_addr": 32506,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #31 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.SP_SelectState",
|
|
"addr": 32507,
|
|
"write_addr": 32507,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #31 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.RemLocSPState",
|
|
"addr": 32508,
|
|
"write_addr": 32508,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #31 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.TuneSetState",
|
|
"addr": 32509,
|
|
"write_addr": 32509,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #31 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-10211A.MD",
|
|
"addr": 32510,
|
|
"write_addr": 32506,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #31 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.PV",
|
|
"addr": 32576,
|
|
"write_addr": 32576,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #32 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.RSP_SP2",
|
|
"addr": 32578,
|
|
"write_addr": 32578,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.SP",
|
|
"addr": 32580,
|
|
"write_addr": 32580,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Output",
|
|
"addr": 32582,
|
|
"write_addr": 32582,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.PV_B",
|
|
"addr": 32584,
|
|
"write_addr": 32584,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #32 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.CarbonPotTemp",
|
|
"addr": 32586,
|
|
"write_addr": 32586,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #32 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.GAIN",
|
|
"addr": 32588,
|
|
"write_addr": 32588,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Direction",
|
|
"addr": 32590,
|
|
"write_addr": 32590,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #32 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.RESET",
|
|
"addr": 32592,
|
|
"write_addr": 32592,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.RATE",
|
|
"addr": 32594,
|
|
"write_addr": 32594,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.CycleTime1",
|
|
"addr": 32596,
|
|
"write_addr": 32596,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #32 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.PV_LowRange",
|
|
"addr": 32598,
|
|
"write_addr": 32598,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #32 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.PV_HighRange",
|
|
"addr": 32600,
|
|
"write_addr": 32600,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #32 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Alarm1SP1",
|
|
"addr": 32602,
|
|
"write_addr": 32602,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.AL1SP1",
|
|
"addr": 32602,
|
|
"write_addr": 32602,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Alarm1SP2",
|
|
"addr": 32604,
|
|
"write_addr": 32604,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Gain2",
|
|
"addr": 32608,
|
|
"write_addr": 32608,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.StepDeadband",
|
|
"addr": 32610,
|
|
"write_addr": 32610,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Reset2",
|
|
"addr": 32612,
|
|
"write_addr": 32612,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Rate2",
|
|
"addr": 32614,
|
|
"write_addr": 32614,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.CycleTime2",
|
|
"addr": 32616,
|
|
"write_addr": 32616,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #32 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.LSP1",
|
|
"addr": 32618,
|
|
"write_addr": 32618,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.LSP2",
|
|
"addr": 32620,
|
|
"write_addr": 32620,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Alarm2SP1",
|
|
"addr": 32622,
|
|
"write_addr": 32622,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.AL2SP1",
|
|
"addr": 32622,
|
|
"write_addr": 32622,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Alarm2SP2",
|
|
"addr": 32624,
|
|
"write_addr": 32624,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.SP_LowLimit",
|
|
"addr": 32628,
|
|
"write_addr": 32628,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.SP_HighLimit",
|
|
"addr": 32630,
|
|
"write_addr": 32630,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.WSP_B",
|
|
"addr": 32632,
|
|
"write_addr": 32632,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Output_LowLimit",
|
|
"addr": 32634,
|
|
"write_addr": 32634,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Output_HighLimit",
|
|
"addr": 32636,
|
|
"write_addr": 32636,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.OP",
|
|
"addr": 32638,
|
|
"write_addr": 32638,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Ratio",
|
|
"addr": 32646,
|
|
"write_addr": 32646,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Bias",
|
|
"addr": 32648,
|
|
"write_addr": 32648,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.Deviation",
|
|
"addr": 32650,
|
|
"write_addr": 32650,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #32 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.ManualReset",
|
|
"addr": 32654,
|
|
"write_addr": 32654,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.FeedforwardGain",
|
|
"addr": 32656,
|
|
"write_addr": 32656,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.LocalPctCO",
|
|
"addr": 32658,
|
|
"write_addr": 32658,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.FurnaceFactor",
|
|
"addr": 32660,
|
|
"write_addr": 32660,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.PercentHydrogen",
|
|
"addr": 32662,
|
|
"write_addr": 32662,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.OnOffHysteresis",
|
|
"addr": 32664,
|
|
"write_addr": 32664,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.CarbPotDewpt",
|
|
"addr": 32666,
|
|
"write_addr": 32666,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.StepMotorTime",
|
|
"addr": 32668,
|
|
"write_addr": 32668,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #32 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.FuzzyEnable",
|
|
"addr": 32759,
|
|
"write_addr": 32759,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #32 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.DemandTune",
|
|
"addr": 32760,
|
|
"write_addr": 32760,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #32 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.AntiSootEnable",
|
|
"addr": 32761,
|
|
"write_addr": 32761,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #32 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.AutoManState",
|
|
"addr": 32762,
|
|
"write_addr": 32762,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #32 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.SP_SelectState",
|
|
"addr": 32763,
|
|
"write_addr": 32763,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #32 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.RemLocSPState",
|
|
"addr": 32764,
|
|
"write_addr": 32764,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #32 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.TuneSetState",
|
|
"addr": 32765,
|
|
"write_addr": 32765,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #32 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-10211A.LoopStatus",
|
|
"addr": 32766,
|
|
"write_addr": 32766,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #32 LoopStatus",
|
|
"archive": false
|
|
}
|
|
]
|
|
} |