이전(PR#5)은 비루프 AnalogPoint에만, 또 realtime=False로 보조를 넣어 적산 QV가 크롤러 폴링집합(is_active AND realtime_enabled)에서 빠져 라이브로 흐르지 않았다. - is_analog 판정을 분기 앞으로 올려 모든 AnalogPoint(루프 포함)에 보조 처리 적용. 루프 엔트리와 겹치면 seen_tags가 중복 흡수. - 슬롯명 있는 A1~A4를 일반적으로 모두 어드레싱(공백 슬롯만 제외). - realtime 기본값(True) 사용 → 보조도 폴링 대상. QV=연속 누적값만 archive 유지. - FlexibleParameter(사용자정의)는 기존대로 realtime=False(폴링 제외) 유지. 맵 재생성(c1~c4): 순수 추가. C3 +6(FICQ-8118/LICA-5113 GAIN/RATE/RESET 등 루프 보조 누락분), 리포트 스팀적산 FIQ-*.QV 전부 포함, 제거 0. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
10899 lines
237 KiB
JSON
10899 lines
237 KiB
JSON
{
|
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"controller": "C1",
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"report_generated": "2026-06-19",
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"float_format": "FP_B",
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"notes": "Register map built from Sinam_Tag_all.xlsx (C1 only). Experion point names are keys; .MD reads LoopStatus(0xBE) and writes AutoManState(0xBA). archive flag indicates history target.",
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"register_count": 1089,
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|
"registers": [
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{
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|
"tag": "FICQ-111.PV",
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|
"addr": 64,
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|
"write_addr": 64,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "R",
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|
"description": "LOOP #1 PV",
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|
"archive": true
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|
},
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|
{
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|
"tag": "FICQ-111.RSP_SP2",
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|
"addr": 66,
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|
"write_addr": 66,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 RSP_SP2",
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|
"archive": false
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|
},
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|
{
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|
"tag": "FICQ-111.SP",
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|
"addr": 68,
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|
"write_addr": 68,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
|
|
"description": "LOOP #1 WSP",
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|
"archive": true
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|
},
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|
{
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|
"tag": "FICQ-111.Output",
|
|
"addr": 70,
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|
"write_addr": 70,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 Output",
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|
"archive": false
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|
},
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|
{
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|
"tag": "FICQ-111.PV_B",
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|
"addr": 72,
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|
"write_addr": 72,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "R",
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|
"description": "LOOP #1 PV_B",
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"archive": false
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},
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|
{
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"tag": "FICQ-111.CarbonPotTemp",
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|
"addr": 74,
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|
"write_addr": 74,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "R",
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|
"description": "LOOP #1 CarbonPotTemp",
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"archive": false
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},
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{
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"tag": "FICQ-111.GAIN",
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"addr": 76,
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"write_addr": 76,
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"count": 2,
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|
"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Gain1",
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"archive": false
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},
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|
{
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"tag": "FICQ-111.Direction",
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|
"addr": 78,
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"write_addr": 78,
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"count": 2,
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"type": "float32",
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"access": "R",
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"description": "LOOP #1 Direction",
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"archive": false
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},
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{
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"tag": "FICQ-111.RESET",
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"addr": 80,
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|
"write_addr": 80,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Reset1",
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"archive": false
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},
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{
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"tag": "FICQ-111.RATE",
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"addr": 82,
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"write_addr": 82,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Rate1",
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|
"archive": false
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},
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{
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|
"tag": "FICQ-111.CycleTime1",
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|
"addr": 84,
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|
"write_addr": 84,
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|
"count": 2,
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|
"type": "float32",
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|
"access": "R",
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|
"description": "LOOP #1 CycleTime1",
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|
"archive": false
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},
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|
{
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"tag": "FICQ-111.PV_LowRange",
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"addr": 86,
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"write_addr": 86,
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"count": 2,
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"type": "float32",
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"access": "R",
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"description": "LOOP #1 PV_LowRange",
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"archive": false
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},
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{
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"tag": "FICQ-111.PV_HighRange",
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"addr": 88,
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"write_addr": 88,
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"count": 2,
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"type": "float32",
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"access": "R",
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"description": "LOOP #1 PV_HighRange",
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"archive": false
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},
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{
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"tag": "FICQ-111.Alarm1SP1",
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"addr": 90,
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"write_addr": 90,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Alarm1SP1",
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"archive": false
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},
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{
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"tag": "FICQ-111.Alarm1SP2",
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|
"addr": 92,
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|
"write_addr": 92,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Alarm1SP2",
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"archive": false
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},
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{
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"tag": "FICQ-111.Gain2",
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"addr": 96,
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"write_addr": 96,
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"count": 2,
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|
"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Gain2",
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"archive": false
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},
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{
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"tag": "FICQ-111.StepDeadband",
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|
"addr": 98,
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|
"write_addr": 98,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 StepDeadband",
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"archive": false
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},
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{
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"tag": "FICQ-111.Reset2",
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"addr": 100,
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"write_addr": 100,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Reset2",
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"archive": false
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},
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{
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"tag": "FICQ-111.Rate2",
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"addr": 102,
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"write_addr": 102,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Rate2",
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"archive": false
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},
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{
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"tag": "FICQ-111.CycleTime2",
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"addr": 104,
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"write_addr": 104,
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"count": 2,
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"type": "float32",
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"access": "R",
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"description": "LOOP #1 CycleTime2",
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"archive": false
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},
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{
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"tag": "FICQ-111.LSP1",
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"addr": 106,
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"write_addr": 106,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 LSP1",
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"archive": false
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},
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{
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"tag": "FICQ-111.LSP2",
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"addr": 108,
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"write_addr": 108,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 LSP2",
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"archive": false
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},
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{
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"tag": "FICQ-111.Alarm2SP1",
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"addr": 110,
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"write_addr": 110,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Alarm2SP1",
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"archive": false
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},
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{
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"tag": "FICQ-111.Alarm2SP2",
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"addr": 112,
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"write_addr": 112,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Alarm2SP2",
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"archive": false
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},
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{
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"tag": "FICQ-111.SP_LowLimit",
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"addr": 116,
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"write_addr": 116,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 SP_LowLimit",
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"archive": false
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},
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{
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"tag": "FICQ-111.SP_HighLimit",
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"addr": 118,
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"write_addr": 118,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 SP_HighLimit",
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"archive": false
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},
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{
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"tag": "FICQ-111.WSP_B",
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"addr": 120,
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"write_addr": 120,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 WSP_B",
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"archive": false
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},
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{
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"tag": "FICQ-111.Output_LowLimit",
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"addr": 122,
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"write_addr": 122,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Output_LowLimit",
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"archive": false
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},
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{
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"tag": "FICQ-111.Output_HighLimit",
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"addr": 124,
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"write_addr": 124,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Output_HighLimit",
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"archive": false
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},
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{
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"tag": "FICQ-111.OP",
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"addr": 126,
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"write_addr": 126,
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"count": 2,
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|
"type": "float32",
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"access": "RW",
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"description": "LOOP #1 OPWORK",
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"archive": true
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},
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{
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"tag": "FICQ-111.Ratio",
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|
"addr": 134,
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"write_addr": 134,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Ratio",
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"archive": false
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},
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{
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"tag": "FICQ-111.Bias",
|
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"addr": 136,
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"write_addr": 136,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 Bias",
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|
"archive": false
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|
},
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|
{
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|
"tag": "FICQ-111.Deviation",
|
|
"addr": 138,
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|
"write_addr": 138,
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"count": 2,
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|
"type": "float32",
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|
"access": "R",
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|
"description": "LOOP #1 Deviation",
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|
"archive": false
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},
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|
{
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|
"tag": "FICQ-111.ManualReset",
|
|
"addr": 142,
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|
"write_addr": 142,
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"count": 2,
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|
"type": "float32",
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"access": "RW",
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"description": "LOOP #1 ManualReset",
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"archive": false
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|
},
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{
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"tag": "FICQ-111.FeedforwardGain",
|
|
"addr": 144,
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|
"write_addr": 144,
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"count": 2,
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|
"type": "float32",
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|
"access": "RW",
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|
"description": "LOOP #1 FeedforwardGain",
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|
"archive": false
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|
},
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|
{
|
|
"tag": "FICQ-111.LocalPctCO",
|
|
"addr": 146,
|
|
"write_addr": 146,
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|
"count": 2,
|
|
"type": "float32",
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|
"access": "RW",
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"description": "LOOP #1 LocalPctCO",
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"archive": false
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},
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{
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"tag": "FICQ-111.FurnaceFactor",
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|
"addr": 148,
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"write_addr": 148,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 FurnaceFactor",
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"archive": false
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},
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|
{
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|
"tag": "FICQ-111.PercentHydrogen",
|
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"addr": 150,
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"write_addr": 150,
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|
"count": 2,
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|
"type": "float32",
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"access": "RW",
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"description": "LOOP #1 PercentHydrogen",
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"archive": false
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},
|
|
{
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|
"tag": "FICQ-111.OnOffHysteresis",
|
|
"addr": 152,
|
|
"write_addr": 152,
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|
"count": 2,
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|
"type": "float32",
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"access": "RW",
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"description": "LOOP #1 OnOffHysteresis",
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"archive": false
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},
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|
{
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|
"tag": "FICQ-111.CarbPotDewpt",
|
|
"addr": 154,
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"write_addr": 154,
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #1 CarbPotDewpt",
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"archive": false
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},
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|
{
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|
"tag": "FICQ-111.StepMotorTime",
|
|
"addr": 156,
|
|
"write_addr": 156,
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|
"count": 2,
|
|
"type": "float32",
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|
"access": "RW",
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"description": "LOOP #1 StepMotorTime",
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"archive": false
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|
},
|
|
{
|
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"tag": "FICQ-111.FuzzyEnable",
|
|
"addr": 247,
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|
"write_addr": 247,
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"count": 1,
|
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"type": "uint16",
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"access": "RW",
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"description": "LOOP #1 FuzzyEnable",
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"archive": false
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|
},
|
|
{
|
|
"tag": "FICQ-111.DemandTune",
|
|
"addr": 248,
|
|
"write_addr": 248,
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|
"count": 1,
|
|
"type": "uint16",
|
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"access": "RW",
|
|
"description": "LOOP #1 DemandTune",
|
|
"archive": false
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},
|
|
{
|
|
"tag": "FICQ-111.AntiSootEnable",
|
|
"addr": 249,
|
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"write_addr": 249,
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|
"count": 1,
|
|
"type": "uint16",
|
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"access": "RW",
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"description": "LOOP #1 AntiSootEnable",
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"archive": false
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},
|
|
{
|
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"tag": "FICQ-111.AutoManState",
|
|
"addr": 250,
|
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"write_addr": 250,
|
|
"count": 1,
|
|
"type": "uint16",
|
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"access": "RW",
|
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"description": "LOOP #1 AutoManState",
|
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"archive": false
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},
|
|
{
|
|
"tag": "FICQ-111.SP_SelectState",
|
|
"addr": 251,
|
|
"write_addr": 251,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #1 SP_SelectState",
|
|
"archive": false
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|
},
|
|
{
|
|
"tag": "FICQ-111.RemLocSPState",
|
|
"addr": 252,
|
|
"write_addr": 252,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #1 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-111.TuneSetState",
|
|
"addr": 253,
|
|
"write_addr": 253,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #1 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-111.MD",
|
|
"addr": 254,
|
|
"write_addr": 250,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #1 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-111.PV",
|
|
"addr": 320,
|
|
"write_addr": 320,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #2 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-111.RSP_SP2",
|
|
"addr": 322,
|
|
"write_addr": 322,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #2 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-111.SP",
|
|
"addr": 324,
|
|
"write_addr": 324,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #2 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-111.Output",
|
|
"addr": 326,
|
|
"write_addr": 326,
|
|
"count": 2,
|
|
"type": "float32",
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|
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|
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"write_addr": 870,
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|
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|
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"access": "RW",
|
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"description": "LOOP #4 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-113.CycleTime2",
|
|
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|
|
"write_addr": 872,
|
|
"count": 2,
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|
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"access": "R",
|
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|
|
"archive": false
|
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|
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{
|
|
"tag": "FICQ-113.LSP1",
|
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"count": 2,
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|
"type": "float32",
|
|
"access": "RW",
|
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"description": "LOOP #4 LSP1",
|
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"archive": false
|
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},
|
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{
|
|
"tag": "FICQ-113.LSP2",
|
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|
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"count": 2,
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"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #4 LSP2",
|
|
"archive": false
|
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},
|
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{
|
|
"tag": "FICQ-113.Alarm2SP1",
|
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|
|
"count": 2,
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|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #4 Alarm2SP1",
|
|
"archive": false
|
|
},
|
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{
|
|
"tag": "FICQ-113.Alarm2SP2",
|
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|
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"count": 2,
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"type": "float32",
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"access": "RW",
|
|
"description": "LOOP #4 Alarm2SP2",
|
|
"archive": false
|
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},
|
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{
|
|
"tag": "FICQ-113.SP_LowLimit",
|
|
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|
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|
|
"count": 2,
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"type": "float32",
|
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"access": "RW",
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"description": "LOOP #4 SP_LowLimit",
|
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"archive": false
|
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},
|
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{
|
|
"tag": "FICQ-113.SP_HighLimit",
|
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|
|
"count": 2,
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|
"type": "float32",
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"access": "RW",
|
|
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|
|
"archive": false
|
|
},
|
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{
|
|
"tag": "FICQ-113.WSP_B",
|
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"addr": 888,
|
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|
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|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #4 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-113.Output_LowLimit",
|
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|
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"write_addr": 890,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #4 Output_LowLimit",
|
|
"archive": false
|
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},
|
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{
|
|
"tag": "FICQ-113.Output_HighLimit",
|
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"count": 2,
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|
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|
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|
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"archive": false
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},
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{
|
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"tag": "FICQ-113.OP",
|
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|
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"count": 2,
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"type": "float32",
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"access": "RW",
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"description": "LOOP #4 OPWORK",
|
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"archive": true
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{
|
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"tag": "FICQ-113.Ratio",
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"addr": 902,
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"count": 2,
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"access": "RW",
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"description": "LOOP #4 Ratio",
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"archive": false
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{
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{
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"tag": "FICQ-113.Deviation",
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|
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"archive": false
|
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{
|
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|
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"type": "float32",
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|
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"description": "LOOP #4 ManualReset",
|
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"archive": false
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{
|
|
"tag": "FICQ-113.FeedforwardGain",
|
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"addr": 912,
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|
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"count": 2,
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"type": "float32",
|
|
"access": "RW",
|
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|
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"archive": false
|
|
},
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{
|
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"tag": "FICQ-113.LocalPctCO",
|
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"addr": 914,
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|
|
"count": 2,
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|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #4 LocalPctCO",
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"archive": false
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},
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{
|
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"tag": "FICQ-113.FurnaceFactor",
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"archive": false
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},
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{
|
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"tag": "FICQ-113.PercentHydrogen",
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"count": 2,
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"type": "float32",
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"access": "RW",
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"archive": false
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{
|
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"tag": "FICQ-113.OnOffHysteresis",
|
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|
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"count": 2,
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"access": "RW",
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|
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"archive": false
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},
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{
|
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"tag": "FICQ-113.CarbPotDewpt",
|
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|
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"count": 2,
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"access": "RW",
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"archive": false
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{
|
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|
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|
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},
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{
|
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|
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|
|
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|
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|
|
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|
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"archive": false
|
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},
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{
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"tag": "FICQ-113.DemandTune",
|
|
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|
|
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|
|
"count": 1,
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|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #4 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-113.AntiSootEnable",
|
|
"addr": 1017,
|
|
"write_addr": 1017,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #4 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-113.AutoManState",
|
|
"addr": 1018,
|
|
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|
|
"count": 1,
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|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #4 AutoManState",
|
|
"archive": false
|
|
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|
|
{
|
|
"tag": "FICQ-113.SP_SelectState",
|
|
"addr": 1019,
|
|
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|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-113.RemLocSPState",
|
|
"addr": 1020,
|
|
"write_addr": 1020,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
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|
|
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|
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|
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|
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},
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{
|
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|
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|
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|
|
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|
|
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|
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|
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|
|
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|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": true
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": true
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"access": "R",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"access": "R",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Direction",
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.RESET",
|
|
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|
|
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|
|
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|
|
"type": "float32",
|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
|
"access": "R",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
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|
|
"count": 2,
|
|
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|
|
"access": "R",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.PV_HighRange",
|
|
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|
|
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|
|
"count": 2,
|
|
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|
|
"access": "R",
|
|
"description": "LOOP #5 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Alarm1SP1",
|
|
"addr": 1114,
|
|
"write_addr": 1114,
|
|
"count": 2,
|
|
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|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.AL1SP1",
|
|
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|
|
"write_addr": 1114,
|
|
"count": 2,
|
|
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|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Alarm1SP2",
|
|
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|
|
"write_addr": 1116,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
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|
|
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|
|
"write_addr": 1120,
|
|
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|
|
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|
|
"access": "RW",
|
|
"description": "LOOP #5 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.StepDeadband",
|
|
"addr": 1122,
|
|
"write_addr": 1122,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Reset2",
|
|
"addr": 1124,
|
|
"write_addr": 1124,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Rate2",
|
|
"addr": 1126,
|
|
"write_addr": 1126,
|
|
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|
|
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|
|
"access": "RW",
|
|
"description": "LOOP #5 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.CycleTime2",
|
|
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|
|
"write_addr": 1128,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #5 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.LSP1",
|
|
"addr": 1130,
|
|
"write_addr": 1130,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.LSP2",
|
|
"addr": 1132,
|
|
"write_addr": 1132,
|
|
"count": 2,
|
|
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|
|
"access": "RW",
|
|
"description": "LOOP #5 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Alarm2SP1",
|
|
"addr": 1134,
|
|
"write_addr": 1134,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.AL2SP1",
|
|
"addr": 1134,
|
|
"write_addr": 1134,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Alarm2SP2",
|
|
"addr": 1136,
|
|
"write_addr": 1136,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.SP_LowLimit",
|
|
"addr": 1140,
|
|
"write_addr": 1140,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.SP_HighLimit",
|
|
"addr": 1142,
|
|
"write_addr": 1142,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.WSP_B",
|
|
"addr": 1144,
|
|
"write_addr": 1144,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Output_LowLimit",
|
|
"addr": 1146,
|
|
"write_addr": 1146,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Output_HighLimit",
|
|
"addr": 1148,
|
|
"write_addr": 1148,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.OP",
|
|
"addr": 1150,
|
|
"write_addr": 1150,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-113.Ratio",
|
|
"addr": 1158,
|
|
"write_addr": 1158,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Bias",
|
|
"addr": 1160,
|
|
"write_addr": 1160,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.Deviation",
|
|
"addr": 1162,
|
|
"write_addr": 1162,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #5 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.ManualReset",
|
|
"addr": 1166,
|
|
"write_addr": 1166,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.FeedforwardGain",
|
|
"addr": 1168,
|
|
"write_addr": 1168,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.LocalPctCO",
|
|
"addr": 1170,
|
|
"write_addr": 1170,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.FurnaceFactor",
|
|
"addr": 1172,
|
|
"write_addr": 1172,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.PercentHydrogen",
|
|
"addr": 1174,
|
|
"write_addr": 1174,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.OnOffHysteresis",
|
|
"addr": 1176,
|
|
"write_addr": 1176,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.CarbPotDewpt",
|
|
"addr": 1178,
|
|
"write_addr": 1178,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.StepMotorTime",
|
|
"addr": 1180,
|
|
"write_addr": 1180,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #5 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.FuzzyEnable",
|
|
"addr": 1271,
|
|
"write_addr": 1271,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #5 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.DemandTune",
|
|
"addr": 1272,
|
|
"write_addr": 1272,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #5 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.AntiSootEnable",
|
|
"addr": 1273,
|
|
"write_addr": 1273,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #5 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.AutoManState",
|
|
"addr": 1274,
|
|
"write_addr": 1274,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #5 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.SP_SelectState",
|
|
"addr": 1275,
|
|
"write_addr": 1275,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #5 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.RemLocSPState",
|
|
"addr": 1276,
|
|
"write_addr": 1276,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #5 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.TuneSetState",
|
|
"addr": 1277,
|
|
"write_addr": 1277,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #5 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.MD",
|
|
"addr": 1278,
|
|
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|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #5 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-111.PV",
|
|
"addr": 1344,
|
|
"write_addr": 1344,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #6 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-111.RSP_SP2",
|
|
"addr": 1346,
|
|
"write_addr": 1346,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.SP",
|
|
"addr": 1348,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-111.Output",
|
|
"addr": 1350,
|
|
"write_addr": 1350,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.PV_B",
|
|
"addr": 1352,
|
|
"write_addr": 1352,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #6 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.CarbonPotTemp",
|
|
"addr": 1354,
|
|
"write_addr": 1354,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.GAIN",
|
|
"addr": 1356,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Direction",
|
|
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|
|
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|
|
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|
|
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|
|
"access": "R",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.RESET",
|
|
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|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.RATE",
|
|
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|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.CycleTime1",
|
|
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|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #6 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.PV_LowRange",
|
|
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|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #6 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.PV_HighRange",
|
|
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|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #6 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Alarm1SP1",
|
|
"addr": 1370,
|
|
"write_addr": 1370,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.AL1SP1",
|
|
"addr": 1370,
|
|
"write_addr": 1370,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Alarm1SP2",
|
|
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|
|
"write_addr": 1372,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Gain2",
|
|
"addr": 1376,
|
|
"write_addr": 1376,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.StepDeadband",
|
|
"addr": 1378,
|
|
"write_addr": 1378,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Reset2",
|
|
"addr": 1380,
|
|
"write_addr": 1380,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Rate2",
|
|
"addr": 1382,
|
|
"write_addr": 1382,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.CycleTime2",
|
|
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|
|
"write_addr": 1384,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #6 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.LSP1",
|
|
"addr": 1386,
|
|
"write_addr": 1386,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.LSP2",
|
|
"addr": 1388,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Alarm2SP1",
|
|
"addr": 1390,
|
|
"write_addr": 1390,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.AL2SP1",
|
|
"addr": 1390,
|
|
"write_addr": 1390,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Alarm2SP2",
|
|
"addr": 1392,
|
|
"write_addr": 1392,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.SP_LowLimit",
|
|
"addr": 1396,
|
|
"write_addr": 1396,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.SP_HighLimit",
|
|
"addr": 1398,
|
|
"write_addr": 1398,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.WSP_B",
|
|
"addr": 1400,
|
|
"write_addr": 1400,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Output_LowLimit",
|
|
"addr": 1402,
|
|
"write_addr": 1402,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Output_HighLimit",
|
|
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|
|
"write_addr": 1404,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.OP",
|
|
"addr": 1406,
|
|
"write_addr": 1406,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-111.Ratio",
|
|
"addr": 1414,
|
|
"write_addr": 1414,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Bias",
|
|
"addr": 1416,
|
|
"write_addr": 1416,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.Deviation",
|
|
"addr": 1418,
|
|
"write_addr": 1418,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #6 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.ManualReset",
|
|
"addr": 1422,
|
|
"write_addr": 1422,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.FeedforwardGain",
|
|
"addr": 1424,
|
|
"write_addr": 1424,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.LocalPctCO",
|
|
"addr": 1426,
|
|
"write_addr": 1426,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.FurnaceFactor",
|
|
"addr": 1428,
|
|
"write_addr": 1428,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.PercentHydrogen",
|
|
"addr": 1430,
|
|
"write_addr": 1430,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.OnOffHysteresis",
|
|
"addr": 1432,
|
|
"write_addr": 1432,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.CarbPotDewpt",
|
|
"addr": 1434,
|
|
"write_addr": 1434,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.StepMotorTime",
|
|
"addr": 1436,
|
|
"write_addr": 1436,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #6 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.FuzzyEnable",
|
|
"addr": 1527,
|
|
"write_addr": 1527,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.DemandTune",
|
|
"addr": 1528,
|
|
"write_addr": 1528,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.AntiSootEnable",
|
|
"addr": 1529,
|
|
"write_addr": 1529,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.AutoManState",
|
|
"addr": 1530,
|
|
"write_addr": 1530,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.SP_SelectState",
|
|
"addr": 1531,
|
|
"write_addr": 1531,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.RemLocSPState",
|
|
"addr": 1532,
|
|
"write_addr": 1532,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.TuneSetState",
|
|
"addr": 1533,
|
|
"write_addr": 1533,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #6 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.MD",
|
|
"addr": 1534,
|
|
"write_addr": 1530,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #6 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-121.PV",
|
|
"addr": 1600,
|
|
"write_addr": 1600,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-121.RSP_SP2",
|
|
"addr": 1602,
|
|
"write_addr": 1602,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.SP",
|
|
"addr": 1604,
|
|
"write_addr": 1604,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-121.Output",
|
|
"addr": 1606,
|
|
"write_addr": 1606,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.PV_B",
|
|
"addr": 1608,
|
|
"write_addr": 1608,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.CarbonPotTemp",
|
|
"addr": 1610,
|
|
"write_addr": 1610,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.GAIN",
|
|
"addr": 1612,
|
|
"write_addr": 1612,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Direction",
|
|
"addr": 1614,
|
|
"write_addr": 1614,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.RESET",
|
|
"addr": 1616,
|
|
"write_addr": 1616,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.RATE",
|
|
"addr": 1618,
|
|
"write_addr": 1618,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.CycleTime1",
|
|
"addr": 1620,
|
|
"write_addr": 1620,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.PV_LowRange",
|
|
"addr": 1622,
|
|
"write_addr": 1622,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.PV_HighRange",
|
|
"addr": 1624,
|
|
"write_addr": 1624,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Alarm1SP1",
|
|
"addr": 1626,
|
|
"write_addr": 1626,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.AL1SP1",
|
|
"addr": 1626,
|
|
"write_addr": 1626,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Alarm1SP2",
|
|
"addr": 1628,
|
|
"write_addr": 1628,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Gain2",
|
|
"addr": 1632,
|
|
"write_addr": 1632,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.StepDeadband",
|
|
"addr": 1634,
|
|
"write_addr": 1634,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Reset2",
|
|
"addr": 1636,
|
|
"write_addr": 1636,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Rate2",
|
|
"addr": 1638,
|
|
"write_addr": 1638,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.CycleTime2",
|
|
"addr": 1640,
|
|
"write_addr": 1640,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.LSP1",
|
|
"addr": 1642,
|
|
"write_addr": 1642,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.LSP2",
|
|
"addr": 1644,
|
|
"write_addr": 1644,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Alarm2SP1",
|
|
"addr": 1646,
|
|
"write_addr": 1646,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.AL2SP1",
|
|
"addr": 1646,
|
|
"write_addr": 1646,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Alarm2SP2",
|
|
"addr": 1648,
|
|
"write_addr": 1648,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.SP_LowLimit",
|
|
"addr": 1652,
|
|
"write_addr": 1652,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.SP_HighLimit",
|
|
"addr": 1654,
|
|
"write_addr": 1654,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.WSP_B",
|
|
"addr": 1656,
|
|
"write_addr": 1656,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Output_LowLimit",
|
|
"addr": 1658,
|
|
"write_addr": 1658,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Output_HighLimit",
|
|
"addr": 1660,
|
|
"write_addr": 1660,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.OP",
|
|
"addr": 1662,
|
|
"write_addr": 1662,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PICA-121.Ratio",
|
|
"addr": 1670,
|
|
"write_addr": 1670,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Bias",
|
|
"addr": 1672,
|
|
"write_addr": 1672,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.Deviation",
|
|
"addr": 1674,
|
|
"write_addr": 1674,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #7 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.ManualReset",
|
|
"addr": 1678,
|
|
"write_addr": 1678,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.FeedforwardGain",
|
|
"addr": 1680,
|
|
"write_addr": 1680,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.LocalPctCO",
|
|
"addr": 1682,
|
|
"write_addr": 1682,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 LocalPctCO",
|
|
"archive": false
|
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},
|
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{
|
|
"tag": "PICA-121.FurnaceFactor",
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|
|
"count": 2,
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|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.PercentHydrogen",
|
|
"addr": 1686,
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|
"write_addr": 1686,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.OnOffHysteresis",
|
|
"addr": 1688,
|
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"write_addr": 1688,
|
|
"count": 2,
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|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.CarbPotDewpt",
|
|
"addr": 1690,
|
|
"write_addr": 1690,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.StepMotorTime",
|
|
"addr": 1692,
|
|
"write_addr": 1692,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #7 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.FuzzyEnable",
|
|
"addr": 1783,
|
|
"write_addr": 1783,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.DemandTune",
|
|
"addr": 1784,
|
|
"write_addr": 1784,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.AntiSootEnable",
|
|
"addr": 1785,
|
|
"write_addr": 1785,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.AutoManState",
|
|
"addr": 1786,
|
|
"write_addr": 1786,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.SP_SelectState",
|
|
"addr": 1787,
|
|
"write_addr": 1787,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.RemLocSPState",
|
|
"addr": 1788,
|
|
"write_addr": 1788,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.TuneSetState",
|
|
"addr": 1789,
|
|
"write_addr": 1789,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #7 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.MD",
|
|
"addr": 1790,
|
|
"write_addr": 1786,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #7 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LIC-121.PV",
|
|
"addr": 1856,
|
|
"write_addr": 1856,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LIC-121.RSP_SP2",
|
|
"addr": 1858,
|
|
"write_addr": 1858,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.SP",
|
|
"addr": 1860,
|
|
"write_addr": 1860,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LIC-121.Output",
|
|
"addr": 1862,
|
|
"write_addr": 1862,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.PV_B",
|
|
"addr": 1864,
|
|
"write_addr": 1864,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.CarbonPotTemp",
|
|
"addr": 1866,
|
|
"write_addr": 1866,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.GAIN",
|
|
"addr": 1868,
|
|
"write_addr": 1868,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Direction",
|
|
"addr": 1870,
|
|
"write_addr": 1870,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.RESET",
|
|
"addr": 1872,
|
|
"write_addr": 1872,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.RATE",
|
|
"addr": 1874,
|
|
"write_addr": 1874,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.CycleTime1",
|
|
"addr": 1876,
|
|
"write_addr": 1876,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.PV_LowRange",
|
|
"addr": 1878,
|
|
"write_addr": 1878,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.PV_HighRange",
|
|
"addr": 1880,
|
|
"write_addr": 1880,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Alarm1SP1",
|
|
"addr": 1882,
|
|
"write_addr": 1882,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.AL1SP1",
|
|
"addr": 1882,
|
|
"write_addr": 1882,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Alarm1SP2",
|
|
"addr": 1884,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Gain2",
|
|
"addr": 1888,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.StepDeadband",
|
|
"addr": 1890,
|
|
"write_addr": 1890,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Reset2",
|
|
"addr": 1892,
|
|
"write_addr": 1892,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Rate2",
|
|
"addr": 1894,
|
|
"write_addr": 1894,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.CycleTime2",
|
|
"addr": 1896,
|
|
"write_addr": 1896,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.LSP1",
|
|
"addr": 1898,
|
|
"write_addr": 1898,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.LSP2",
|
|
"addr": 1900,
|
|
"write_addr": 1900,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Alarm2SP1",
|
|
"addr": 1902,
|
|
"write_addr": 1902,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.AL2SP1",
|
|
"addr": 1902,
|
|
"write_addr": 1902,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Alarm2SP2",
|
|
"addr": 1904,
|
|
"write_addr": 1904,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.SP_LowLimit",
|
|
"addr": 1908,
|
|
"write_addr": 1908,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.SP_HighLimit",
|
|
"addr": 1910,
|
|
"write_addr": 1910,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.WSP_B",
|
|
"addr": 1912,
|
|
"write_addr": 1912,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Output_LowLimit",
|
|
"addr": 1914,
|
|
"write_addr": 1914,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Output_HighLimit",
|
|
"addr": 1916,
|
|
"write_addr": 1916,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.OP",
|
|
"addr": 1918,
|
|
"write_addr": 1918,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LIC-121.Ratio",
|
|
"addr": 1926,
|
|
"write_addr": 1926,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Bias",
|
|
"addr": 1928,
|
|
"write_addr": 1928,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.Deviation",
|
|
"addr": 1930,
|
|
"write_addr": 1930,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #8 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.ManualReset",
|
|
"addr": 1934,
|
|
"write_addr": 1934,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.FeedforwardGain",
|
|
"addr": 1936,
|
|
"write_addr": 1936,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.LocalPctCO",
|
|
"addr": 1938,
|
|
"write_addr": 1938,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.FurnaceFactor",
|
|
"addr": 1940,
|
|
"write_addr": 1940,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.PercentHydrogen",
|
|
"addr": 1942,
|
|
"write_addr": 1942,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.OnOffHysteresis",
|
|
"addr": 1944,
|
|
"write_addr": 1944,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.CarbPotDewpt",
|
|
"addr": 1946,
|
|
"write_addr": 1946,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.StepMotorTime",
|
|
"addr": 1948,
|
|
"write_addr": 1948,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #8 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.FuzzyEnable",
|
|
"addr": 2039,
|
|
"write_addr": 2039,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.DemandTune",
|
|
"addr": 2040,
|
|
"write_addr": 2040,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.AntiSootEnable",
|
|
"addr": 2041,
|
|
"write_addr": 2041,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.AutoManState",
|
|
"addr": 2042,
|
|
"write_addr": 2042,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.SP_SelectState",
|
|
"addr": 2043,
|
|
"write_addr": 2043,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.RemLocSPState",
|
|
"addr": 2044,
|
|
"write_addr": 2044,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.TuneSetState",
|
|
"addr": 2045,
|
|
"write_addr": 2045,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #8 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.MD",
|
|
"addr": 2046,
|
|
"write_addr": 2042,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #8 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-131.PV",
|
|
"addr": 2112,
|
|
"write_addr": 2112,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-131.RSP_SP2",
|
|
"addr": 2114,
|
|
"write_addr": 2114,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.SP",
|
|
"addr": 2116,
|
|
"write_addr": 2116,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-131.Output",
|
|
"addr": 2118,
|
|
"write_addr": 2118,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.PV_B",
|
|
"addr": 2120,
|
|
"write_addr": 2120,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.CarbonPotTemp",
|
|
"addr": 2122,
|
|
"write_addr": 2122,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.GAIN",
|
|
"addr": 2124,
|
|
"write_addr": 2124,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Direction",
|
|
"addr": 2126,
|
|
"write_addr": 2126,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.RESET",
|
|
"addr": 2128,
|
|
"write_addr": 2128,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.RATE",
|
|
"addr": 2130,
|
|
"write_addr": 2130,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.CycleTime1",
|
|
"addr": 2132,
|
|
"write_addr": 2132,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.PV_LowRange",
|
|
"addr": 2134,
|
|
"write_addr": 2134,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.PV_HighRange",
|
|
"addr": 2136,
|
|
"write_addr": 2136,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Alarm1SP1",
|
|
"addr": 2138,
|
|
"write_addr": 2138,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.AL1SP1",
|
|
"addr": 2138,
|
|
"write_addr": 2138,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Alarm1SP2",
|
|
"addr": 2140,
|
|
"write_addr": 2140,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Gain2",
|
|
"addr": 2144,
|
|
"write_addr": 2144,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.StepDeadband",
|
|
"addr": 2146,
|
|
"write_addr": 2146,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Reset2",
|
|
"addr": 2148,
|
|
"write_addr": 2148,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Rate2",
|
|
"addr": 2150,
|
|
"write_addr": 2150,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.CycleTime2",
|
|
"addr": 2152,
|
|
"write_addr": 2152,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.LSP1",
|
|
"addr": 2154,
|
|
"write_addr": 2154,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.LSP2",
|
|
"addr": 2156,
|
|
"write_addr": 2156,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Alarm2SP1",
|
|
"addr": 2158,
|
|
"write_addr": 2158,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.AL2SP1",
|
|
"addr": 2158,
|
|
"write_addr": 2158,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Alarm2SP2",
|
|
"addr": 2160,
|
|
"write_addr": 2160,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.SP_LowLimit",
|
|
"addr": 2164,
|
|
"write_addr": 2164,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.SP_HighLimit",
|
|
"addr": 2166,
|
|
"write_addr": 2166,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.WSP_B",
|
|
"addr": 2168,
|
|
"write_addr": 2168,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Output_LowLimit",
|
|
"addr": 2170,
|
|
"write_addr": 2170,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Output_HighLimit",
|
|
"addr": 2172,
|
|
"write_addr": 2172,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.OP",
|
|
"addr": 2174,
|
|
"write_addr": 2174,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-131.Ratio",
|
|
"addr": 2182,
|
|
"write_addr": 2182,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Bias",
|
|
"addr": 2184,
|
|
"write_addr": 2184,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.Deviation",
|
|
"addr": 2186,
|
|
"write_addr": 2186,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #9 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.ManualReset",
|
|
"addr": 2190,
|
|
"write_addr": 2190,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.FeedforwardGain",
|
|
"addr": 2192,
|
|
"write_addr": 2192,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.LocalPctCO",
|
|
"addr": 2194,
|
|
"write_addr": 2194,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.FurnaceFactor",
|
|
"addr": 2196,
|
|
"write_addr": 2196,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.PercentHydrogen",
|
|
"addr": 2198,
|
|
"write_addr": 2198,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.OnOffHysteresis",
|
|
"addr": 2200,
|
|
"write_addr": 2200,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.CarbPotDewpt",
|
|
"addr": 2202,
|
|
"write_addr": 2202,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.StepMotorTime",
|
|
"addr": 2204,
|
|
"write_addr": 2204,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #9 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.FuzzyEnable",
|
|
"addr": 2295,
|
|
"write_addr": 2295,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.DemandTune",
|
|
"addr": 2296,
|
|
"write_addr": 2296,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.AntiSootEnable",
|
|
"addr": 2297,
|
|
"write_addr": 2297,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.AutoManState",
|
|
"addr": 2298,
|
|
"write_addr": 2298,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.SP_SelectState",
|
|
"addr": 2299,
|
|
"write_addr": 2299,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.RemLocSPState",
|
|
"addr": 2300,
|
|
"write_addr": 2300,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.TuneSetState",
|
|
"addr": 2301,
|
|
"write_addr": 2301,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #9 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.MD",
|
|
"addr": 2302,
|
|
"write_addr": 2298,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #9 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-132.PV",
|
|
"addr": 2368,
|
|
"write_addr": 2368,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-132.RSP_SP2",
|
|
"addr": 2370,
|
|
"write_addr": 2370,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.SP",
|
|
"addr": 2372,
|
|
"write_addr": 2372,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Output",
|
|
"addr": 2374,
|
|
"write_addr": 2374,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.PV_B",
|
|
"addr": 2376,
|
|
"write_addr": 2376,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.CarbonPotTemp",
|
|
"addr": 2378,
|
|
"write_addr": 2378,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.GAIN",
|
|
"addr": 2380,
|
|
"write_addr": 2380,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Direction",
|
|
"addr": 2382,
|
|
"write_addr": 2382,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.RESET",
|
|
"addr": 2384,
|
|
"write_addr": 2384,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.RATE",
|
|
"addr": 2386,
|
|
"write_addr": 2386,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.CycleTime1",
|
|
"addr": 2388,
|
|
"write_addr": 2388,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.PV_LowRange",
|
|
"addr": 2390,
|
|
"write_addr": 2390,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.PV_HighRange",
|
|
"addr": 2392,
|
|
"write_addr": 2392,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Alarm1SP1",
|
|
"addr": 2394,
|
|
"write_addr": 2394,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Alarm1SP2",
|
|
"addr": 2396,
|
|
"write_addr": 2396,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Gain2",
|
|
"addr": 2400,
|
|
"write_addr": 2400,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.StepDeadband",
|
|
"addr": 2402,
|
|
"write_addr": 2402,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Reset2",
|
|
"addr": 2404,
|
|
"write_addr": 2404,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Rate2",
|
|
"addr": 2406,
|
|
"write_addr": 2406,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.CycleTime2",
|
|
"addr": 2408,
|
|
"write_addr": 2408,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.LSP1",
|
|
"addr": 2410,
|
|
"write_addr": 2410,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.LSP2",
|
|
"addr": 2412,
|
|
"write_addr": 2412,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Alarm2SP1",
|
|
"addr": 2414,
|
|
"write_addr": 2414,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Alarm2SP2",
|
|
"addr": 2416,
|
|
"write_addr": 2416,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.SP_LowLimit",
|
|
"addr": 2420,
|
|
"write_addr": 2420,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.SP_HighLimit",
|
|
"addr": 2422,
|
|
"write_addr": 2422,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.WSP_B",
|
|
"addr": 2424,
|
|
"write_addr": 2424,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Output_LowLimit",
|
|
"addr": 2426,
|
|
"write_addr": 2426,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Output_HighLimit",
|
|
"addr": 2428,
|
|
"write_addr": 2428,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.OP",
|
|
"addr": 2430,
|
|
"write_addr": 2430,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Ratio",
|
|
"addr": 2438,
|
|
"write_addr": 2438,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Bias",
|
|
"addr": 2440,
|
|
"write_addr": 2440,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.Deviation",
|
|
"addr": 2442,
|
|
"write_addr": 2442,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #10 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.ManualReset",
|
|
"addr": 2446,
|
|
"write_addr": 2446,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.FeedforwardGain",
|
|
"addr": 2448,
|
|
"write_addr": 2448,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.LocalPctCO",
|
|
"addr": 2450,
|
|
"write_addr": 2450,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.FurnaceFactor",
|
|
"addr": 2452,
|
|
"write_addr": 2452,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.PercentHydrogen",
|
|
"addr": 2454,
|
|
"write_addr": 2454,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.OnOffHysteresis",
|
|
"addr": 2456,
|
|
"write_addr": 2456,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.CarbPotDewpt",
|
|
"addr": 2458,
|
|
"write_addr": 2458,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.StepMotorTime",
|
|
"addr": 2460,
|
|
"write_addr": 2460,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #10 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.FuzzyEnable",
|
|
"addr": 2551,
|
|
"write_addr": 2551,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.DemandTune",
|
|
"addr": 2552,
|
|
"write_addr": 2552,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.AntiSootEnable",
|
|
"addr": 2553,
|
|
"write_addr": 2553,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.AutoManState",
|
|
"addr": 2554,
|
|
"write_addr": 2554,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.SP_SelectState",
|
|
"addr": 2555,
|
|
"write_addr": 2555,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.RemLocSPState",
|
|
"addr": 2556,
|
|
"write_addr": 2556,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.TuneSetState",
|
|
"addr": 2557,
|
|
"write_addr": 2557,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #10 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.MD",
|
|
"addr": 2558,
|
|
"write_addr": 2554,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #10 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "AIC-131.PV",
|
|
"addr": 2624,
|
|
"write_addr": 2624,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "AIC-131.RSP_SP2",
|
|
"addr": 2626,
|
|
"write_addr": 2626,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.SP",
|
|
"addr": 2628,
|
|
"write_addr": 2628,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "AIC-131.Output",
|
|
"addr": 2630,
|
|
"write_addr": 2630,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.PV_B",
|
|
"addr": 2632,
|
|
"write_addr": 2632,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.CarbonPotTemp",
|
|
"addr": 2634,
|
|
"write_addr": 2634,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.GAIN",
|
|
"addr": 2636,
|
|
"write_addr": 2636,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.Direction",
|
|
"addr": 2638,
|
|
"write_addr": 2638,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.RESET",
|
|
"addr": 2640,
|
|
"write_addr": 2640,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.RATE",
|
|
"addr": 2642,
|
|
"write_addr": 2642,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.CycleTime1",
|
|
"addr": 2644,
|
|
"write_addr": 2644,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.PV_LowRange",
|
|
"addr": 2646,
|
|
"write_addr": 2646,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.PV_HighRange",
|
|
"addr": 2648,
|
|
"write_addr": 2648,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.Alarm1SP1",
|
|
"addr": 2650,
|
|
"write_addr": 2650,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.Alarm1SP2",
|
|
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|
|
"write_addr": 2652,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.Gain2",
|
|
"addr": 2656,
|
|
"write_addr": 2656,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.StepDeadband",
|
|
"addr": 2658,
|
|
"write_addr": 2658,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.Reset2",
|
|
"addr": 2660,
|
|
"write_addr": 2660,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.Rate2",
|
|
"addr": 2662,
|
|
"write_addr": 2662,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.CycleTime2",
|
|
"addr": 2664,
|
|
"write_addr": 2664,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #11 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.LSP1",
|
|
"addr": 2666,
|
|
"write_addr": 2666,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.LSP2",
|
|
"addr": 2668,
|
|
"write_addr": 2668,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.Alarm2SP1",
|
|
"addr": 2670,
|
|
"write_addr": 2670,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.Alarm2SP2",
|
|
"addr": 2672,
|
|
"write_addr": 2672,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.SP_LowLimit",
|
|
"addr": 2676,
|
|
"write_addr": 2676,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.SP_HighLimit",
|
|
"addr": 2678,
|
|
"write_addr": 2678,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.WSP_B",
|
|
"addr": 2680,
|
|
"write_addr": 2680,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.Output_LowLimit",
|
|
"addr": 2682,
|
|
"write_addr": 2682,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.Output_HighLimit",
|
|
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|
|
"write_addr": 2684,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.OP",
|
|
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|
|
"write_addr": 2686,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "AIC-131.Ratio",
|
|
"addr": 2694,
|
|
"write_addr": 2694,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 Ratio",
|
|
"archive": false
|
|
},
|
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{
|
|
"tag": "AIC-131.Bias",
|
|
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|
|
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|
|
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|
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|
"access": "RW",
|
|
"description": "LOOP #11 Bias",
|
|
"archive": false
|
|
},
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|
{
|
|
"tag": "AIC-131.Deviation",
|
|
"addr": 2698,
|
|
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|
|
"count": 2,
|
|
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|
|
"access": "R",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.ManualReset",
|
|
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|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.FeedforwardGain",
|
|
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|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.LocalPctCO",
|
|
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|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.FurnaceFactor",
|
|
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|
|
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|
|
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|
|
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|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.PercentHydrogen",
|
|
"addr": 2710,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.OnOffHysteresis",
|
|
"addr": 2712,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.CarbPotDewpt",
|
|
"addr": 2714,
|
|
"write_addr": 2714,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.StepMotorTime",
|
|
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|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #11 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.FuzzyEnable",
|
|
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|
|
"write_addr": 2807,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.DemandTune",
|
|
"addr": 2808,
|
|
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|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.AntiSootEnable",
|
|
"addr": 2809,
|
|
"write_addr": 2809,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.AutoManState",
|
|
"addr": 2810,
|
|
"write_addr": 2810,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.SP_SelectState",
|
|
"addr": 2811,
|
|
"write_addr": 2811,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.RemLocSPState",
|
|
"addr": 2812,
|
|
"write_addr": 2812,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #11 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.TuneSetState",
|
|
"addr": 2813,
|
|
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|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
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|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.MD",
|
|
"addr": 2814,
|
|
"write_addr": 2810,
|
|
"count": 1,
|
|
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|
|
"access": "R",
|
|
"description": "LOOP #11 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-131.PV",
|
|
"addr": 2880,
|
|
"write_addr": 2880,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-131.RSP_SP2",
|
|
"addr": 2882,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.SP",
|
|
"addr": 2884,
|
|
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|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Output",
|
|
"addr": 2886,
|
|
"write_addr": 2886,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.PV_B",
|
|
"addr": 2888,
|
|
"write_addr": 2888,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.CarbonPotTemp",
|
|
"addr": 2890,
|
|
"write_addr": 2890,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.GAIN",
|
|
"addr": 2892,
|
|
"write_addr": 2892,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Direction",
|
|
"addr": 2894,
|
|
"write_addr": 2894,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.RESET",
|
|
"addr": 2896,
|
|
"write_addr": 2896,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.RATE",
|
|
"addr": 2898,
|
|
"write_addr": 2898,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.CycleTime1",
|
|
"addr": 2900,
|
|
"write_addr": 2900,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.PV_LowRange",
|
|
"addr": 2902,
|
|
"write_addr": 2902,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.PV_HighRange",
|
|
"addr": 2904,
|
|
"write_addr": 2904,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Alarm1SP1",
|
|
"addr": 2906,
|
|
"write_addr": 2906,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Alarm1SP2",
|
|
"addr": 2908,
|
|
"write_addr": 2908,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Gain2",
|
|
"addr": 2912,
|
|
"write_addr": 2912,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.StepDeadband",
|
|
"addr": 2914,
|
|
"write_addr": 2914,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Reset2",
|
|
"addr": 2916,
|
|
"write_addr": 2916,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Rate2",
|
|
"addr": 2918,
|
|
"write_addr": 2918,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.CycleTime2",
|
|
"addr": 2920,
|
|
"write_addr": 2920,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.LSP1",
|
|
"addr": 2922,
|
|
"write_addr": 2922,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.LSP2",
|
|
"addr": 2924,
|
|
"write_addr": 2924,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Alarm2SP1",
|
|
"addr": 2926,
|
|
"write_addr": 2926,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Alarm2SP2",
|
|
"addr": 2928,
|
|
"write_addr": 2928,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.SP_LowLimit",
|
|
"addr": 2932,
|
|
"write_addr": 2932,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.SP_HighLimit",
|
|
"addr": 2934,
|
|
"write_addr": 2934,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.WSP_B",
|
|
"addr": 2936,
|
|
"write_addr": 2936,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Output_LowLimit",
|
|
"addr": 2938,
|
|
"write_addr": 2938,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Output_HighLimit",
|
|
"addr": 2940,
|
|
"write_addr": 2940,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.OP",
|
|
"addr": 2942,
|
|
"write_addr": 2942,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Ratio",
|
|
"addr": 2950,
|
|
"write_addr": 2950,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Bias",
|
|
"addr": 2952,
|
|
"write_addr": 2952,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.Deviation",
|
|
"addr": 2954,
|
|
"write_addr": 2954,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #12 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.ManualReset",
|
|
"addr": 2958,
|
|
"write_addr": 2958,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.FeedforwardGain",
|
|
"addr": 2960,
|
|
"write_addr": 2960,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.LocalPctCO",
|
|
"addr": 2962,
|
|
"write_addr": 2962,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.FurnaceFactor",
|
|
"addr": 2964,
|
|
"write_addr": 2964,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.PercentHydrogen",
|
|
"addr": 2966,
|
|
"write_addr": 2966,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.OnOffHysteresis",
|
|
"addr": 2968,
|
|
"write_addr": 2968,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.CarbPotDewpt",
|
|
"addr": 2970,
|
|
"write_addr": 2970,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.StepMotorTime",
|
|
"addr": 2972,
|
|
"write_addr": 2972,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #12 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.FuzzyEnable",
|
|
"addr": 3063,
|
|
"write_addr": 3063,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.DemandTune",
|
|
"addr": 3064,
|
|
"write_addr": 3064,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.AntiSootEnable",
|
|
"addr": 3065,
|
|
"write_addr": 3065,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.AutoManState",
|
|
"addr": 3066,
|
|
"write_addr": 3066,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.SP_SelectState",
|
|
"addr": 3067,
|
|
"write_addr": 3067,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.RemLocSPState",
|
|
"addr": 3068,
|
|
"write_addr": 3068,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.TuneSetState",
|
|
"addr": 3069,
|
|
"write_addr": 3069,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #12 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.MD",
|
|
"addr": 3070,
|
|
"write_addr": 3066,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #12 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-123.PV",
|
|
"addr": 3136,
|
|
"write_addr": 3136,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-123.RSP_SP2",
|
|
"addr": 3138,
|
|
"write_addr": 3138,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.SP",
|
|
"addr": 3140,
|
|
"write_addr": 3140,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-123.Output",
|
|
"addr": 3142,
|
|
"write_addr": 3142,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.PV_B",
|
|
"addr": 3144,
|
|
"write_addr": 3144,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.CarbonPotTemp",
|
|
"addr": 3146,
|
|
"write_addr": 3146,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.GAIN",
|
|
"addr": 3148,
|
|
"write_addr": 3148,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.GAIN",
|
|
"addr": 3148,
|
|
"write_addr": 3148,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux GAIN",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Direction",
|
|
"addr": 3150,
|
|
"write_addr": 3150,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.RESET",
|
|
"addr": 3152,
|
|
"write_addr": 3152,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.RESET",
|
|
"addr": 3152,
|
|
"write_addr": 3152,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux RESET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.RATE",
|
|
"addr": 3154,
|
|
"write_addr": 3154,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.RATE",
|
|
"addr": 3154,
|
|
"write_addr": 3154,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux RATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.CycleTime1",
|
|
"addr": 3156,
|
|
"write_addr": 3156,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.PV_LowRange",
|
|
"addr": 3158,
|
|
"write_addr": 3158,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.PV_HighRange",
|
|
"addr": 3160,
|
|
"write_addr": 3160,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Alarm1SP1",
|
|
"addr": 3162,
|
|
"write_addr": 3162,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.AL1SP1",
|
|
"addr": 3162,
|
|
"write_addr": 3162,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Alarm1SP2",
|
|
"addr": 3164,
|
|
"write_addr": 3164,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Gain2",
|
|
"addr": 3168,
|
|
"write_addr": 3168,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.StepDeadband",
|
|
"addr": 3170,
|
|
"write_addr": 3170,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Reset2",
|
|
"addr": 3172,
|
|
"write_addr": 3172,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Rate2",
|
|
"addr": 3174,
|
|
"write_addr": 3174,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.CycleTime2",
|
|
"addr": 3176,
|
|
"write_addr": 3176,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.LSP1",
|
|
"addr": 3178,
|
|
"write_addr": 3178,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.LSP2",
|
|
"addr": 3180,
|
|
"write_addr": 3180,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Alarm2SP1",
|
|
"addr": 3182,
|
|
"write_addr": 3182,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.AL2SP1",
|
|
"addr": 3182,
|
|
"write_addr": 3182,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter AL2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Alarm2SP2",
|
|
"addr": 3184,
|
|
"write_addr": 3184,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.SP_LowLimit",
|
|
"addr": 3188,
|
|
"write_addr": 3188,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.SP_HighLimit",
|
|
"addr": 3190,
|
|
"write_addr": 3190,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.WSP_B",
|
|
"addr": 3192,
|
|
"write_addr": 3192,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Output_LowLimit",
|
|
"addr": 3194,
|
|
"write_addr": 3194,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Output_HighLimit",
|
|
"addr": 3196,
|
|
"write_addr": 3196,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.OP",
|
|
"addr": 3198,
|
|
"write_addr": 3198,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-123.Ratio",
|
|
"addr": 3206,
|
|
"write_addr": 3206,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Bias",
|
|
"addr": 3208,
|
|
"write_addr": 3208,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.Deviation",
|
|
"addr": 3210,
|
|
"write_addr": 3210,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #13 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.ManualReset",
|
|
"addr": 3214,
|
|
"write_addr": 3214,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.FeedforwardGain",
|
|
"addr": 3216,
|
|
"write_addr": 3216,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.LocalPctCO",
|
|
"addr": 3218,
|
|
"write_addr": 3218,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.FurnaceFactor",
|
|
"addr": 3220,
|
|
"write_addr": 3220,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.PercentHydrogen",
|
|
"addr": 3222,
|
|
"write_addr": 3222,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.OnOffHysteresis",
|
|
"addr": 3224,
|
|
"write_addr": 3224,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.CarbPotDewpt",
|
|
"addr": 3226,
|
|
"write_addr": 3226,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.StepMotorTime",
|
|
"addr": 3228,
|
|
"write_addr": 3228,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #13 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.FuzzyEnable",
|
|
"addr": 3319,
|
|
"write_addr": 3319,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.DemandTune",
|
|
"addr": 3320,
|
|
"write_addr": 3320,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.AntiSootEnable",
|
|
"addr": 3321,
|
|
"write_addr": 3321,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.AutoManState",
|
|
"addr": 3322,
|
|
"write_addr": 3322,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.SP_SelectState",
|
|
"addr": 3323,
|
|
"write_addr": 3323,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.RemLocSPState",
|
|
"addr": 3324,
|
|
"write_addr": 3324,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.TuneSetState",
|
|
"addr": 3325,
|
|
"write_addr": 3325,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #13 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.MD",
|
|
"addr": 3326,
|
|
"write_addr": 3322,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #13 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-124.PV",
|
|
"addr": 3392,
|
|
"write_addr": 3392,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-124.RSP_SP2",
|
|
"addr": 3394,
|
|
"write_addr": 3394,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.SP",
|
|
"addr": 3396,
|
|
"write_addr": 3396,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Output",
|
|
"addr": 3398,
|
|
"write_addr": 3398,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.PV_B",
|
|
"addr": 3400,
|
|
"write_addr": 3400,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.CarbonPotTemp",
|
|
"addr": 3402,
|
|
"write_addr": 3402,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.GAIN",
|
|
"addr": 3404,
|
|
"write_addr": 3404,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Direction",
|
|
"addr": 3406,
|
|
"write_addr": 3406,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.RESET",
|
|
"addr": 3408,
|
|
"write_addr": 3408,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.RATE",
|
|
"addr": 3410,
|
|
"write_addr": 3410,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.CycleTime1",
|
|
"addr": 3412,
|
|
"write_addr": 3412,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.PV_LowRange",
|
|
"addr": 3414,
|
|
"write_addr": 3414,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.PV_HighRange",
|
|
"addr": 3416,
|
|
"write_addr": 3416,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Alarm1SP1",
|
|
"addr": 3418,
|
|
"write_addr": 3418,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Alarm1SP2",
|
|
"addr": 3420,
|
|
"write_addr": 3420,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Gain2",
|
|
"addr": 3424,
|
|
"write_addr": 3424,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.StepDeadband",
|
|
"addr": 3426,
|
|
"write_addr": 3426,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Reset2",
|
|
"addr": 3428,
|
|
"write_addr": 3428,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Rate2",
|
|
"addr": 3430,
|
|
"write_addr": 3430,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.CycleTime2",
|
|
"addr": 3432,
|
|
"write_addr": 3432,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.LSP1",
|
|
"addr": 3434,
|
|
"write_addr": 3434,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.LSP2",
|
|
"addr": 3436,
|
|
"write_addr": 3436,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Alarm2SP1",
|
|
"addr": 3438,
|
|
"write_addr": 3438,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Alarm2SP2",
|
|
"addr": 3440,
|
|
"write_addr": 3440,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.SP_LowLimit",
|
|
"addr": 3444,
|
|
"write_addr": 3444,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.SP_HighLimit",
|
|
"addr": 3446,
|
|
"write_addr": 3446,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.WSP_B",
|
|
"addr": 3448,
|
|
"write_addr": 3448,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Output_LowLimit",
|
|
"addr": 3450,
|
|
"write_addr": 3450,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Output_HighLimit",
|
|
"addr": 3452,
|
|
"write_addr": 3452,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.OP",
|
|
"addr": 3454,
|
|
"write_addr": 3454,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Ratio",
|
|
"addr": 3462,
|
|
"write_addr": 3462,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Bias",
|
|
"addr": 3464,
|
|
"write_addr": 3464,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.Deviation",
|
|
"addr": 3466,
|
|
"write_addr": 3466,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #14 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.ManualReset",
|
|
"addr": 3470,
|
|
"write_addr": 3470,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.FeedforwardGain",
|
|
"addr": 3472,
|
|
"write_addr": 3472,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.LocalPctCO",
|
|
"addr": 3474,
|
|
"write_addr": 3474,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.FurnaceFactor",
|
|
"addr": 3476,
|
|
"write_addr": 3476,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.PercentHydrogen",
|
|
"addr": 3478,
|
|
"write_addr": 3478,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.OnOffHysteresis",
|
|
"addr": 3480,
|
|
"write_addr": 3480,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.CarbPotDewpt",
|
|
"addr": 3482,
|
|
"write_addr": 3482,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.StepMotorTime",
|
|
"addr": 3484,
|
|
"write_addr": 3484,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #14 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.FuzzyEnable",
|
|
"addr": 3575,
|
|
"write_addr": 3575,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.DemandTune",
|
|
"addr": 3576,
|
|
"write_addr": 3576,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.AntiSootEnable",
|
|
"addr": 3577,
|
|
"write_addr": 3577,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.AutoManState",
|
|
"addr": 3578,
|
|
"write_addr": 3578,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.SP_SelectState",
|
|
"addr": 3579,
|
|
"write_addr": 3579,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.RemLocSPState",
|
|
"addr": 3580,
|
|
"write_addr": 3580,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.TuneSetState",
|
|
"addr": 3581,
|
|
"write_addr": 3581,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #14 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.MD",
|
|
"addr": 3582,
|
|
"write_addr": 3578,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #14 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-122.PV",
|
|
"addr": 3648,
|
|
"write_addr": 3648,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-122.RSP_SP2",
|
|
"addr": 3650,
|
|
"write_addr": 3650,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.SP",
|
|
"addr": 3652,
|
|
"write_addr": 3652,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Output",
|
|
"addr": 3654,
|
|
"write_addr": 3654,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.PV_B",
|
|
"addr": 3656,
|
|
"write_addr": 3656,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.CarbonPotTemp",
|
|
"addr": 3658,
|
|
"write_addr": 3658,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.GAIN",
|
|
"addr": 3660,
|
|
"write_addr": 3660,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Direction",
|
|
"addr": 3662,
|
|
"write_addr": 3662,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.RESET",
|
|
"addr": 3664,
|
|
"write_addr": 3664,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.RATE",
|
|
"addr": 3666,
|
|
"write_addr": 3666,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.CycleTime1",
|
|
"addr": 3668,
|
|
"write_addr": 3668,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.PV_LowRange",
|
|
"addr": 3670,
|
|
"write_addr": 3670,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.PV_HighRange",
|
|
"addr": 3672,
|
|
"write_addr": 3672,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Alarm1SP1",
|
|
"addr": 3674,
|
|
"write_addr": 3674,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Alarm1SP2",
|
|
"addr": 3676,
|
|
"write_addr": 3676,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Gain2",
|
|
"addr": 3680,
|
|
"write_addr": 3680,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.StepDeadband",
|
|
"addr": 3682,
|
|
"write_addr": 3682,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Reset2",
|
|
"addr": 3684,
|
|
"write_addr": 3684,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Rate2",
|
|
"addr": 3686,
|
|
"write_addr": 3686,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.CycleTime2",
|
|
"addr": 3688,
|
|
"write_addr": 3688,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.LSP1",
|
|
"addr": 3690,
|
|
"write_addr": 3690,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.LSP2",
|
|
"addr": 3692,
|
|
"write_addr": 3692,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Alarm2SP1",
|
|
"addr": 3694,
|
|
"write_addr": 3694,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Alarm2SP2",
|
|
"addr": 3696,
|
|
"write_addr": 3696,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.SP_LowLimit",
|
|
"addr": 3700,
|
|
"write_addr": 3700,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.SP_HighLimit",
|
|
"addr": 3702,
|
|
"write_addr": 3702,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.WSP_B",
|
|
"addr": 3704,
|
|
"write_addr": 3704,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Output_LowLimit",
|
|
"addr": 3706,
|
|
"write_addr": 3706,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Output_HighLimit",
|
|
"addr": 3708,
|
|
"write_addr": 3708,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.OP",
|
|
"addr": 3710,
|
|
"write_addr": 3710,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Ratio",
|
|
"addr": 3718,
|
|
"write_addr": 3718,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Bias",
|
|
"addr": 3720,
|
|
"write_addr": 3720,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.Deviation",
|
|
"addr": 3722,
|
|
"write_addr": 3722,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #15 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.ManualReset",
|
|
"addr": 3726,
|
|
"write_addr": 3726,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.FeedforwardGain",
|
|
"addr": 3728,
|
|
"write_addr": 3728,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.LocalPctCO",
|
|
"addr": 3730,
|
|
"write_addr": 3730,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.FurnaceFactor",
|
|
"addr": 3732,
|
|
"write_addr": 3732,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.PercentHydrogen",
|
|
"addr": 3734,
|
|
"write_addr": 3734,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.OnOffHysteresis",
|
|
"addr": 3736,
|
|
"write_addr": 3736,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.CarbPotDewpt",
|
|
"addr": 3738,
|
|
"write_addr": 3738,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.StepMotorTime",
|
|
"addr": 3740,
|
|
"write_addr": 3740,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #15 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.FuzzyEnable",
|
|
"addr": 3831,
|
|
"write_addr": 3831,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.DemandTune",
|
|
"addr": 3832,
|
|
"write_addr": 3832,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.AntiSootEnable",
|
|
"addr": 3833,
|
|
"write_addr": 3833,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.AutoManState",
|
|
"addr": 3834,
|
|
"write_addr": 3834,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.SP_SelectState",
|
|
"addr": 3835,
|
|
"write_addr": 3835,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.RemLocSPState",
|
|
"addr": 3836,
|
|
"write_addr": 3836,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.TuneSetState",
|
|
"addr": 3837,
|
|
"write_addr": 3837,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #15 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.MD",
|
|
"addr": 3838,
|
|
"write_addr": 3834,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #15 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-705.PV",
|
|
"addr": 3904,
|
|
"write_addr": 3904,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-705.RSP_SP2",
|
|
"addr": 3906,
|
|
"write_addr": 3906,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 RSP_SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.SP",
|
|
"addr": 3908,
|
|
"write_addr": 3908,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 WSP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-705.Output",
|
|
"addr": 3910,
|
|
"write_addr": 3910,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Output",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.PV_B",
|
|
"addr": 3912,
|
|
"write_addr": 3912,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 PV_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.CarbonPotTemp",
|
|
"addr": 3914,
|
|
"write_addr": 3914,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 CarbonPotTemp",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Gain1",
|
|
"addr": 3916,
|
|
"write_addr": 3916,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Gain1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Direction",
|
|
"addr": 3918,
|
|
"write_addr": 3918,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 Direction",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Reset1",
|
|
"addr": 3920,
|
|
"write_addr": 3920,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Reset1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Rate1",
|
|
"addr": 3922,
|
|
"write_addr": 3922,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Rate1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.CycleTime1",
|
|
"addr": 3924,
|
|
"write_addr": 3924,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 CycleTime1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.PV_LowRange",
|
|
"addr": 3926,
|
|
"write_addr": 3926,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 PV_LowRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.PV_HighRange",
|
|
"addr": 3928,
|
|
"write_addr": 3928,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 PV_HighRange",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Alarm1SP1",
|
|
"addr": 3930,
|
|
"write_addr": 3930,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Alarm1SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Alarm1SP2",
|
|
"addr": 3932,
|
|
"write_addr": 3932,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Alarm1SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Gain2",
|
|
"addr": 3936,
|
|
"write_addr": 3936,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Gain2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.StepDeadband",
|
|
"addr": 3938,
|
|
"write_addr": 3938,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 StepDeadband",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Reset2",
|
|
"addr": 3940,
|
|
"write_addr": 3940,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Reset2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Rate2",
|
|
"addr": 3942,
|
|
"write_addr": 3942,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Rate2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.CycleTime2",
|
|
"addr": 3944,
|
|
"write_addr": 3944,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 CycleTime2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.LSP1",
|
|
"addr": 3946,
|
|
"write_addr": 3946,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 LSP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.LSP2",
|
|
"addr": 3948,
|
|
"write_addr": 3948,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 LSP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Alarm2SP1",
|
|
"addr": 3950,
|
|
"write_addr": 3950,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Alarm2SP1",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Alarm2SP2",
|
|
"addr": 3952,
|
|
"write_addr": 3952,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Alarm2SP2",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.SP_LowLimit",
|
|
"addr": 3956,
|
|
"write_addr": 3956,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 SP_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.SP_HighLimit",
|
|
"addr": 3958,
|
|
"write_addr": 3958,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 SP_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.WSP_B",
|
|
"addr": 3960,
|
|
"write_addr": 3960,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 WSP_B",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Output_LowLimit",
|
|
"addr": 3962,
|
|
"write_addr": 3962,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Output_LowLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Output_HighLimit",
|
|
"addr": 3964,
|
|
"write_addr": 3964,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Output_HighLimit",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.OP",
|
|
"addr": 3966,
|
|
"write_addr": 3966,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 OPWORK",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-705.Ratio",
|
|
"addr": 3974,
|
|
"write_addr": 3974,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Ratio",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Bias",
|
|
"addr": 3976,
|
|
"write_addr": 3976,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 Bias",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.Deviation",
|
|
"addr": 3978,
|
|
"write_addr": 3978,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "LOOP #16 Deviation",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.ManualReset",
|
|
"addr": 3982,
|
|
"write_addr": 3982,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 ManualReset",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.FeedforwardGain",
|
|
"addr": 3984,
|
|
"write_addr": 3984,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 FeedforwardGain",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.LocalPctCO",
|
|
"addr": 3986,
|
|
"write_addr": 3986,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 LocalPctCO",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.FurnaceFactor",
|
|
"addr": 3988,
|
|
"write_addr": 3988,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 FurnaceFactor",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.PercentHydrogen",
|
|
"addr": 3990,
|
|
"write_addr": 3990,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 PercentHydrogen",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.OnOffHysteresis",
|
|
"addr": 3992,
|
|
"write_addr": 3992,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 OnOffHysteresis",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.CarbPotDewpt",
|
|
"addr": 3994,
|
|
"write_addr": 3994,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 CarbPotDewpt",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.StepMotorTime",
|
|
"addr": 3996,
|
|
"write_addr": 3996,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "LOOP #16 StepMotorTime",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.FuzzyEnable",
|
|
"addr": 4087,
|
|
"write_addr": 4087,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 FuzzyEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.DemandTune",
|
|
"addr": 4088,
|
|
"write_addr": 4088,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 DemandTune",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.AntiSootEnable",
|
|
"addr": 4089,
|
|
"write_addr": 4089,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 AntiSootEnable",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.AutoManState",
|
|
"addr": 4090,
|
|
"write_addr": 4090,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 AutoManState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.SP_SelectState",
|
|
"addr": 4091,
|
|
"write_addr": 4091,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 SP_SelectState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.RemLocSPState",
|
|
"addr": 4092,
|
|
"write_addr": 4092,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 RemLocSPState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.TuneSetState",
|
|
"addr": 4093,
|
|
"write_addr": 4093,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "RW",
|
|
"description": "LOOP #16 TuneSetState",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-705.MD",
|
|
"addr": 4094,
|
|
"write_addr": 4090,
|
|
"count": 1,
|
|
"type": "uint16",
|
|
"access": "R",
|
|
"description": "LOOP #16 Mode status (read=LoopStatus 0xBE, write=AutoManState 0xBA)",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-111_1.RST",
|
|
"addr": 6336,
|
|
"write_addr": 6336,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "RECIPE_SEL.PV",
|
|
"addr": 6338,
|
|
"write_addr": 6338,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "RECIPE_SEL.SP",
|
|
"addr": 6338,
|
|
"write_addr": 6338,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint SP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-124_R.PV",
|
|
"addr": 6340,
|
|
"write_addr": 6340,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-124_R.OP",
|
|
"addr": 6340,
|
|
"write_addr": 6340,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-102_IL.LSET",
|
|
"addr": 6342,
|
|
"write_addr": 6342,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-101.OP",
|
|
"addr": 6344,
|
|
"write_addr": 6344,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-111_2.RST",
|
|
"addr": 6346,
|
|
"write_addr": 6346,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-102.OP",
|
|
"addr": 6348,
|
|
"write_addr": 6348,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-111_3.RST",
|
|
"addr": 6350,
|
|
"write_addr": 6350,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-103_IL.LSET",
|
|
"addr": 6352,
|
|
"write_addr": 6352,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-111_4.RST",
|
|
"addr": 6354,
|
|
"write_addr": 6354,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-103.OP",
|
|
"addr": 6356,
|
|
"write_addr": 6356,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-104_IL.LSET",
|
|
"addr": 6358,
|
|
"write_addr": 6358,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-104.OP",
|
|
"addr": 6360,
|
|
"write_addr": 6360,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-204.OP",
|
|
"addr": 6362,
|
|
"write_addr": 6362,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-204_IL.LSET",
|
|
"addr": 6364,
|
|
"write_addr": 6364,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-203.OP",
|
|
"addr": 6366,
|
|
"write_addr": 6366,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-203_IL.LSET",
|
|
"addr": 6368,
|
|
"write_addr": 6368,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-202.OP",
|
|
"addr": 6370,
|
|
"write_addr": 6370,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-202_IL.LSET",
|
|
"addr": 6372,
|
|
"write_addr": 6372,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-201_IL.LSET",
|
|
"addr": 6374,
|
|
"write_addr": 6374,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-201.OP",
|
|
"addr": 6376,
|
|
"write_addr": 6376,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LISA-501_IL.LSET",
|
|
"addr": 6378,
|
|
"write_addr": 6378,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "EMG_BYPASS.PV",
|
|
"addr": 6382,
|
|
"write_addr": 6382,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "EMG_BYPASS.OP",
|
|
"addr": 6382,
|
|
"write_addr": 6382,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123_IL.LSET",
|
|
"addr": 6384,
|
|
"write_addr": 6384,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-501.OP",
|
|
"addr": 6386,
|
|
"write_addr": 6386,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-502.OP",
|
|
"addr": 6390,
|
|
"write_addr": 6390,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-602.OP",
|
|
"addr": 6390,
|
|
"write_addr": 6390,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-801.OP",
|
|
"addr": 6394,
|
|
"write_addr": 6394,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-126.OP",
|
|
"addr": 6396,
|
|
"write_addr": 6396,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113_IL.LSET",
|
|
"addr": 6398,
|
|
"write_addr": 6398,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-124.SP",
|
|
"addr": 6404,
|
|
"write_addr": 6404,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint SP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-124_SEL.PV",
|
|
"addr": 6404,
|
|
"write_addr": 6404,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-124_SEL.SP",
|
|
"addr": 6404,
|
|
"write_addr": 6404,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint SP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FCV111_AL_SET.PV",
|
|
"addr": 6408,
|
|
"write_addr": 6408,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FCV111_AL_SET.SP",
|
|
"addr": 6408,
|
|
"write_addr": 6408,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint SP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "P-114.OP",
|
|
"addr": 6410,
|
|
"write_addr": 6410,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-121_IL.LSET",
|
|
"addr": 6412,
|
|
"write_addr": 6412,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-116.OP",
|
|
"addr": 6414,
|
|
"write_addr": 6414,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-128.LSET",
|
|
"addr": 6416,
|
|
"write_addr": 6416,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-128_IL.LSET",
|
|
"addr": 6416,
|
|
"write_addr": 6416,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-124.OP",
|
|
"addr": 6418,
|
|
"write_addr": 6418,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-101_IL.LSET",
|
|
"addr": 6420,
|
|
"write_addr": 6420,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-402.OP",
|
|
"addr": 6422,
|
|
"write_addr": 6422,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIS-402.HSET",
|
|
"addr": 6424,
|
|
"write_addr": 6424,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter HSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIS-402.LSET",
|
|
"addr": 6426,
|
|
"write_addr": 6426,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "XV-402.MD",
|
|
"addr": 6428,
|
|
"write_addr": 6428,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint MD",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PIA-700.LSET",
|
|
"addr": 6430,
|
|
"write_addr": 6430,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LISA-401_IL.LSET",
|
|
"addr": 6432,
|
|
"write_addr": 6432,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AG-503.OP",
|
|
"addr": 6434,
|
|
"write_addr": 6434,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "EMG_READY.PV",
|
|
"addr": 6436,
|
|
"write_addr": 6436,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "EMG_READY.OP",
|
|
"addr": 6436,
|
|
"write_addr": 6436,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PIA-900.LSET",
|
|
"addr": 6438,
|
|
"write_addr": 6438,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "MANUAL_SHUTDOWN.PV",
|
|
"addr": 6440,
|
|
"write_addr": 6440,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "MANUAL_SHUTDOWN.OP",
|
|
"addr": 6440,
|
|
"write_addr": 6440,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PISA-952_LOW.PV",
|
|
"addr": 6442,
|
|
"write_addr": 6442,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "PISA-952_LOW.SP",
|
|
"addr": 6442,
|
|
"write_addr": 6442,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint SP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "RECIPE_PB.PV",
|
|
"addr": 6444,
|
|
"write_addr": 6444,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "RECIPE_PB.OP",
|
|
"addr": 6444,
|
|
"write_addr": 6444,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-111_LSP.PV",
|
|
"addr": 6448,
|
|
"write_addr": 6448,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TICA-111_LSP.SP",
|
|
"addr": 6448,
|
|
"write_addr": 6448,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint SP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "SP_DOWN.PV",
|
|
"addr": 6450,
|
|
"write_addr": 6450,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "SP_DOWN.OP",
|
|
"addr": 6450,
|
|
"write_addr": 6450,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111.LSP",
|
|
"addr": 6452,
|
|
"write_addr": 6452,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-111.LSP",
|
|
"addr": 6454,
|
|
"write_addr": 6454,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113.LSP",
|
|
"addr": 6456,
|
|
"write_addr": 6456,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-113.LSP",
|
|
"addr": 6458,
|
|
"write_addr": 6458,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AIC-131.LSP",
|
|
"addr": 6460,
|
|
"write_addr": 6460,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.RSP",
|
|
"addr": 6462,
|
|
"write_addr": 6462,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131.LSP",
|
|
"addr": 6464,
|
|
"write_addr": 6464,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.LSP",
|
|
"addr": 6466,
|
|
"write_addr": 6466,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIC-121.LSP",
|
|
"addr": 6468,
|
|
"write_addr": 6468,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121.LSP",
|
|
"addr": 6470,
|
|
"write_addr": 6470,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-124.RSP",
|
|
"addr": 6472,
|
|
"write_addr": 6472,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123.LSP",
|
|
"addr": 6474,
|
|
"write_addr": 6474,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "M131_IL_SET.PV",
|
|
"addr": 6476,
|
|
"write_addr": 6476,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "M131_IL_SET.SP",
|
|
"addr": 6476,
|
|
"write_addr": 6476,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint SP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-131.LSET",
|
|
"addr": 6476,
|
|
"write_addr": 6476,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AG-131.OP",
|
|
"addr": 6478,
|
|
"write_addr": 6478,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-127.OP",
|
|
"addr": 6480,
|
|
"write_addr": 6480,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "M131_IL_HISTERISIS.PV",
|
|
"addr": 6482,
|
|
"write_addr": 6482,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "M131_IL_HISTERISIS.SP",
|
|
"addr": 6482,
|
|
"write_addr": 6482,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint SP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "P-129.OP",
|
|
"addr": 6484,
|
|
"write_addr": 6484,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-113.RST",
|
|
"addr": 6486,
|
|
"write_addr": 6486,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-403.OP",
|
|
"addr": 6488,
|
|
"write_addr": 6488,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-114.RST",
|
|
"addr": 6490,
|
|
"write_addr": 6490,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-132.OP",
|
|
"addr": 6492,
|
|
"write_addr": 6492,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-123.RST",
|
|
"addr": 6494,
|
|
"write_addr": 6494,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "HT_LOW.PV",
|
|
"addr": 6496,
|
|
"write_addr": 6496,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "HT_LOW.SP",
|
|
"addr": 6496,
|
|
"write_addr": 6496,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint SP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-124.RST",
|
|
"addr": 6498,
|
|
"write_addr": 6498,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-132.RST",
|
|
"addr": 6500,
|
|
"write_addr": 6500,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-502_IL.HISTERISIS",
|
|
"addr": 6502,
|
|
"write_addr": 6502,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter HISTERISIS",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-502_IL.LSET",
|
|
"addr": 6504,
|
|
"write_addr": 6504,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter LSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "EMG_RESET.PV",
|
|
"addr": 6506,
|
|
"write_addr": 6506,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "EMG_RESET.OP",
|
|
"addr": 6506,
|
|
"write_addr": 6506,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-128.OP",
|
|
"addr": 6510,
|
|
"write_addr": 6510,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-131.RST",
|
|
"addr": 6516,
|
|
"write_addr": 6516,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "F-601.OP",
|
|
"addr": 6518,
|
|
"write_addr": 6518,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "F-601.HZSET",
|
|
"addr": 6518,
|
|
"write_addr": 6518,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter HZSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AG-131.HZSET",
|
|
"addr": 6518,
|
|
"write_addr": 6518,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter HZSET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-130A.OP",
|
|
"addr": 6520,
|
|
"write_addr": 6520,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-130B.OP",
|
|
"addr": 6522,
|
|
"write_addr": 6522,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-111_1.START",
|
|
"addr": 6524,
|
|
"write_addr": 6524,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter START",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-111_3.START",
|
|
"addr": 6526,
|
|
"write_addr": 6526,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter START",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "H-701.OP",
|
|
"addr": 6528,
|
|
"write_addr": 6528,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-6101_STATE.OP",
|
|
"addr": 6530,
|
|
"write_addr": 6530,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-6201_STATE.OP",
|
|
"addr": 6532,
|
|
"write_addr": 6532,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-6201_HS.PV",
|
|
"addr": 6532,
|
|
"write_addr": 6532,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-6201_HS.OP",
|
|
"addr": 6532,
|
|
"write_addr": 6532,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131-IL-RST.PV",
|
|
"addr": 6534,
|
|
"write_addr": 6534,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131-IL-RST.OP",
|
|
"addr": 6534,
|
|
"write_addr": 6534,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131_IL.RST",
|
|
"addr": 6534,
|
|
"write_addr": 6534,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-123_IL.RST",
|
|
"addr": 6536,
|
|
"write_addr": 6536,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121-IL-RST.PV",
|
|
"addr": 6538,
|
|
"write_addr": 6538,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-121-IL-RST.OP",
|
|
"addr": 6538,
|
|
"write_addr": 6538,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-111-IL-RST.PV",
|
|
"addr": 6540,
|
|
"write_addr": 6540,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-111-IL-RST.OP",
|
|
"addr": 6540,
|
|
"write_addr": 6540,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TICA-111-HI-IL.RST",
|
|
"addr": 6540,
|
|
"write_addr": 6540,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111-IL-RST.PV",
|
|
"addr": 6542,
|
|
"write_addr": 6542,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "PICA-111-IL-RST.OP",
|
|
"addr": 6542,
|
|
"write_addr": 6542,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-113_IL.RESET",
|
|
"addr": 6544,
|
|
"write_addr": 6544,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RESET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TIA-121A-IL-SET.PV",
|
|
"addr": 6546,
|
|
"write_addr": 6546,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TIA-121A-IL-SET.SP",
|
|
"addr": 6546,
|
|
"write_addr": 6546,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint SP",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "LICA-121-IL-RST.PV",
|
|
"addr": 6550,
|
|
"write_addr": 6550,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-121-IL-RST.OP",
|
|
"addr": 6550,
|
|
"write_addr": 6550,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-121_IL.RESET",
|
|
"addr": 6550,
|
|
"write_addr": 6550,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RESET",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "C-111.PV",
|
|
"addr": 6554,
|
|
"write_addr": 6554,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "C-111.OP",
|
|
"addr": 6554,
|
|
"write_addr": 6554,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "C-121.PV",
|
|
"addr": 6556,
|
|
"write_addr": 6556,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "C-121.OP",
|
|
"addr": 6556,
|
|
"write_addr": 6556,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "StatusPoint OP",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-115.RST",
|
|
"addr": 6558,
|
|
"write_addr": 6558,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FIQ-125.RST",
|
|
"addr": 6560,
|
|
"write_addr": 6560,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "AnalogPoint aux RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-122.RST",
|
|
"addr": 6562,
|
|
"write_addr": 6562,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "RW",
|
|
"description": "FlexibleParameter RST",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-114.STATE",
|
|
"addr": 8194,
|
|
"write_addr": 8194,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-124.STATE",
|
|
"addr": 8206,
|
|
"write_addr": 8206,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-127.STATE",
|
|
"addr": 8218,
|
|
"write_addr": 8218,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-132.STATE",
|
|
"addr": 8230,
|
|
"write_addr": 8230,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "AG-131.STATE",
|
|
"addr": 8242,
|
|
"write_addr": 8242,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter STATE",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "TE_OUT.PV",
|
|
"addr": 8250,
|
|
"write_addr": 8250,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "HT_RUN.PV",
|
|
"addr": 8252,
|
|
"write_addr": 8252,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LIA-101.PV",
|
|
"addr": 8254,
|
|
"write_addr": 8254,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-111_1.PV",
|
|
"addr": 8256,
|
|
"write_addr": 8256,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-111_2.PV",
|
|
"addr": 8260,
|
|
"write_addr": 8260,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-111_3.PV",
|
|
"addr": 8262,
|
|
"write_addr": 8262,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-111_4.PV",
|
|
"addr": 8264,
|
|
"write_addr": 8264,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "N2_FAIL.PV",
|
|
"addr": 8282,
|
|
"write_addr": 8282,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FCV111_OP_ALM.PV",
|
|
"addr": 8300,
|
|
"write_addr": 8300,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "LICA-131_IL.PV",
|
|
"addr": 8306,
|
|
"write_addr": 8306,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "STEAM_PRESS_LOW.PV",
|
|
"addr": 8312,
|
|
"write_addr": 8312,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "IA_PRESS_LOW.PV",
|
|
"addr": 8318,
|
|
"write_addr": 8318,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FICQ-113.QV",
|
|
"addr": 8324,
|
|
"write_addr": 8324,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-114.PV",
|
|
"addr": 8330,
|
|
"write_addr": 8330,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FIQ-114.QV",
|
|
"addr": 8330,
|
|
"write_addr": 8330,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint aux QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TI-202.PV",
|
|
"addr": 8332,
|
|
"write_addr": 8332,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "TI-204.PV",
|
|
"addr": 8334,
|
|
"write_addr": 8334,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "P-803.PV",
|
|
"addr": 8336,
|
|
"write_addr": 8336,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "P-805.PV",
|
|
"addr": 8338,
|
|
"write_addr": 8338,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "DW_ALM.PV",
|
|
"addr": 8340,
|
|
"write_addr": 8340,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "StatusPoint PV",
|
|
"archive": false
|
|
},
|
|
{
|
|
"tag": "FQ-123.PV",
|
|
"addr": 8342,
|
|
"write_addr": 8342,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FIQ-123.QV",
|
|
"addr": 8342,
|
|
"write_addr": 8342,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint aux QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FQ-124.PV",
|
|
"addr": 8344,
|
|
"write_addr": 8344,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint PV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-124.QV",
|
|
"addr": 8344,
|
|
"write_addr": 8344,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-132.QV",
|
|
"addr": 8346,
|
|
"write_addr": 8346,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FIQ-115.PV",
|
|
"addr": 8348,
|
|
"write_addr": 8348,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
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|
"tag": "FIQ-115.QV",
|
|
"addr": 8650,
|
|
"write_addr": 8650,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint aux QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FIQ-125.QV",
|
|
"addr": 8652,
|
|
"write_addr": 8652,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "AnalogPoint aux QV",
|
|
"archive": true
|
|
},
|
|
{
|
|
"tag": "FICQ-122.QV",
|
|
"addr": 8654,
|
|
"write_addr": 8654,
|
|
"count": 2,
|
|
"type": "float32",
|
|
"access": "R",
|
|
"description": "FlexibleParameter QV",
|
|
"archive": true
|
|
}
|
|
]
|
|
} |